• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.2
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• pp.111-120
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• 2011

A two-dimensional analytical model for deriving the threshold voltage of a short channel fully depleted (FD) cylindrical/surrounding gate MOSFET (CGT/SGT) is suggested. By taking into account the lateral variation of the surface potential, introducing the natural length expression, and using the Bessel functions of the first and the second kinds of order zero, we can derive potentials in the gate oxide layer and the silicon core fully two-dimensionally. Making use of these potentials, the minimum surface potential can be obtained to derive the threshold voltage as a closed-form expression in terms of various device parameters and applied voltages. Obtained results can be used to explain the drain-induced threshold voltage roll-off of a CGT/SGT in a unified manner.

• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.4
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• pp.458-466
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• 2012

A Dual metal gate stack cylindrical/ surrounded gate MOSFET (DMGSA CGT/SGT MOSFET) has been proposed and an analytical model has been developed to examine the impact of this structure in suppressing short channel effects and in enhancing the device performance. It is demonstrated that incorporation of gate stack along with dual metal gate architecture results in improvement in short channel immunity. It is also examined that for DMGSA CGT/SGT the minimum surface potential in the channel reduces, resulting increase in electron velocity and thereby improving the carrier transport efficiency. Furthermore, the device has been analyzed at different bias point for both single material gate stack architecture (SMGSA) and dual material gate stack architecture (DMGSA) and found that DMGSA has superior characteristics as compared to SMGSA devices. The analytical results obtained from the proposed model agree well with the simulated results obtained from 3D ATLAS Device simulator.

• KOREAN JOURNAL OF CROP SCIENCE
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• v.59 no.3
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• pp.341-349
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• 2014

Field emergence of Azuki bean is poor due to hard seed coat as compared to other legumes. In this study, an attempt was made to develop prediction method with regression analysis based on various seed vigor tests in laboratory for field emergence of azuki bean. Azuki bean seeds artificially aged to provide various levels of seed quality were evaluated by the standard germination test (SGT), cold germination test (CT), cool germination test (CGT), complex stressing vigor test (CSVT), tetrazolium(TZ) vigor test and electroconductivity test. The SGT was suitable for predicting the field emergence in the unaged high vigor seeds. The abnormal seedling percentage and shoot length in the CGT were highly correlated with field emergence of moderate vigor seeds artificially aged for 2 days. Electroconductivity, seed viability in the CSVT, and vigor and predicted germinability in the tetrazolium vigor test were also useful for predicting field emergence. Percent of ungerminated seed in the CSVT was correlated with field emergence in the low vigor seeds artificially aged for 4 days. In a stepwise multiple regression analysis, seed viability in the SGT, normal seedling percentage and dry matter weight in the CGT accounted for 86.9% of the predicted value of field emergence in azuki bean.

• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.4
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• pp.377-387
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• 2012

An intrinsic small signal equivalent circuit model of Cylindrical/Surrounded gate MOSFET is proposed. Admittance parameters of the device are extracted from circuit analysis and intrinsic circuit elements are presented in terms of real and imaginary parts of the admittance parameters. S parameters are then evaluated and justified with the simulated data extracted from 3D device simulation.