• Computational Structural Engineering
• /
• v.9 no.3
• /
• pp.97-105
• /
• 1996

An integrated environment for optimum design has been developed using Motif. The integrated environment is composed of the preprocessor, the postprocessor and the optimization part. The preprocessor is part of making a finite element model for optimum structural design and the postprocessor displays results of optimum design and the optimization part is the part which execute optimization. It is designed to reduce user's difficulties in structural optimum design. It used Graphic User Interface for the concurrent representation of various inputs and outputs through the dialog box, mouse and keyboard. Structural optimum design can be done easily through dialog box, menu, concurrent representation of modeling process and results of structural optimum design can be understood easily through stress contour, deformed model and graph of cost function.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.18 no.2
• /
• pp.239-249
• /
• 1993

In this paper, we present a design and implementation of Hangul C Programming language corresponding to Turbo C. The instruction of Hangul C were selected to be easily understood by elementary middle, high school students, and DOS commands and error message were translated into the Hangul.

• The KIPS Transactions:PartC
• /
• v.13C no.3 s.106
• /
• pp.295-302
• /
• 2006

An intrusion detection system writes a lot of alarms against attack behaviors in real time. These alarms contain not only actual attack alarms, but also false alarms that are mistakes made by the intrusion detection system. False alarms are the main reason that reduces the efficiency of the intrusion detection system, and we propose framework for false alarms analysis in the paper. Also, we apply an incremental data mining method for pattern analysis of false alarms increasing continuously. The framework consists of GUI, DB Manager, Alert Preprocessor, and False Alarm Analyzer. We analyze the false alarms increasingly through the experiment of the proposed framework and show that false alarms are reduced by applying the analyzed false alarm rules in the intrusion detection system.

• 제어로봇시스템학회:학술대회논문집
• /
• 1993.10a
• /
• pp.685-691
• /
• 1993

This paper introduces a PC-based image data processing unit that is composed of preprocessor board and main processor board; The preprocessor contains Inmos A110 processor and efficient H/W architecture for fast mask/logic operations at the speed of video signal rate. It is controlled by the main processor which communicates with the host PC. The main processor board contains TI TMS320C31 digital signal processor, and can access the frame memory of the processor for extra S/W tasks. We test 3*3, 5*5 masks and logic operations on 386/486/DSP and compare the result with that of the proposed unit. The result shows ours are extremely faster than conventional CPU based approach, that is, over several hundred times faster than even DSP.

• 한국전산유체공학회:학술대회논문집
• /
• 2003.08a
• /
• pp.69-75
• /
• 2003

본 연구에서는 격자 생성, 초기유동조건 및 경계조건 설정 등 일련의 전처리 과정을 사용자에게 친숙한 그래픽 인터페이스 환경으로 개발하였다. MFC/Visual C++를 이용하여 개발된 전처리 프로그램은 Windows 계열의 OS와 호환이 가능하며, 기하학적 격자생성, 초기값 설정 및 수치해석 코드의 제어변수를 생성할 수 있다. 한편 사용자의 편의를 위해서 전처리 과정을 격자생성(단일격자생성, 다중격자생성), 유체 물성치정의, 경계조건 생성, 초기조건 생성 및 코드제어로 구분하였다. 개발된 전처리 프로그램의 특성으로서 다중 격자 생성 작업을 단일 격자계의 중첩으로 구성될 수 있도록 각 경계면을 "interface"형을 취하는 기능을 제공하도록 하였으며 개발된 전처리 과정을 16도의 경사면을 가지는 Compression ramp 문제 및 축대칭 Bump 문제에 적용하여 개발된 전처리 과정을 검증하였다.

• 제어로봇시스템학회:학술대회논문집
• /
• 2001.10a
• /
• pp.69.5-69
• /
• 2001

Computer simulations are widely used to analyze passenger safety in traffic accidents. ATB(articulated total body) is a computer simulation model developed to predict gross human body response to such dynamic environments as vehicle crashes and pilot ejections. ATB, whose code is open, has high flexibility and application capability that users can easily insert defined modules and functions. ATB is, however, inconvenient as it was coded in FORTRAN and it needs a formatted input file. Moreover, it takes much time to make input files and to modify coding errors. This study aims to increase user friendliness by adding a preprocessor program, WINATB(WiNdow ATB), to the conventional ATB. WINATB programmed in Visual C++ and OpenGL uses ATB IV as a dynamic solver ...

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.31 no.7C
• /
• pp.706-712
• /
• 2006

In this letter, we propose a compact CORDIC processor for implementation of carrier frequency synchronization block in an OFDM (Orthogonal Frequency Division Multiplexing) system. The compact CORDIC processor is proposed by using inherenct properties of an OFDM system for estimation and compensation of carrier frequency offset, and is composed of a compact CORDIC preprocessor and a compact CORDIC processor. The compact CORDIC preprocessor plays a role of normalizing input signal efficiently, and the compact CORDIC processor is proposed to perform the vectoring mode and rotational mode jointly in CORDIC operation for carrier frequency synchronization. It is shown by FPGA implementation that the proposed compact CORDIC processor can achieve better performance with a significantly reduced hardware complexity than the conventional CORDIC approach.

• 제어로봇시스템학회:학술대회논문집
• /
• 1987.10b
• /
• pp.352-357
• /
• 1987

The Auto Tuning Controller is designed using Fuzzy set theory. And to verify its validity it is Applied to the Auto Tuner of hydraulic Control System. Fuzzy Tuning Procedures are written by linguistic model and translated into C language formation by preprocessor. Then it is executed with state feedback controller in real time, Fuzzy Logic Controller adjusts state feedback gain by proper tuning logic in each step to satisfy the desired maximum overshoot and settling time.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.60 no.1
• /
• pp.156-160
• /
• 2011

This paper describes the design and implementation of a System-on-a-Chip (SoC) for pattern recognition to use in embedded applications. The target Soc consists of LEON2 core, AMBA/APB bus-systems and custom-designed accelerators for Gaussian Pyramid construction, lighting compensation and histogram equalization. A new FPGA-based prototyping platform is implemented and used for design and verification of the target SoC. To ensure that the implemented SoC satisfies the required performances, a pattern recognition application is performed.

• Journal of the Korea Society of Computer and Information
• /
• v.21 no.4
• /
• pp.1-8
• /
• 2016

In small embedded systems including IoT devices, memory size is very small and it is important to reduce memory amount for execution of application programs. For multi-threaded applications, stack may consume a large amount of memory because each thread has its own stack of sufficiently large size for worst case. This paper presents an implementation of single stack multi-threading, called SSThread (Single Stack Thread), by sharing a stack for all threads to reduce stack memory size. By using SSThread, multi-threaded applications can be programmed based on normal C language environment and there is no requirement of transporting multi-threading operating systems. It consists of several library functions and various C macro definitions. Even though some functional restrictions in comparison to operating systems supporting complete multi-thread functionalities, it is very useful for small embedded systems with tiny memory size and it is simple to setup programming environment for multi-thread applications.