• Journal of Power Electronics
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• v.18 no.2
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• pp.356-363
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• 2018

The combination of a buck converter and a forward converter can be considered to accomplish a high step-down non-isolated converter. To decrease the insufficient step-down ratio of a regular buck converter and to distribute switch voltage stress, a forward-integrated buck (FIB) converter is proposed in this paper. The proposed interleaved DC-DC converter provides an additional step-down gain with the help of a forward converter. In addition to its simple structure, the transformer flux reset problem is solved and an additional magnetic core reset winding is not required. The operational principle and an analysis of the proposed FIB converter are presented and verified by experimental results obtained with a 240 W, 150 V/24 V prototype.

• Journal of Korea Multimedia Society
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• v.19 no.2
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• pp.352-359
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• 2016

This paper presents high efficiency 5A synchronous DC-DC buck converter. The proposed DC-DC buck converter works from 4.5V to 18V input voltage range, and provides up to 5A of continuous output current and output voltage adjustable down to 0.8V. This chip is packaged MCP(multi-chip package) with control chip, top side P-CH switch, and bottom side N-CH switch. This chip is designed in a 25V high voltage CMOS 0.35um technology. It has a maximum power efficiency of up to 94% and internal 3msec soft start and fixed 500KHz PWM(Pulse Width Modulation) operations. It also includes cycle by cycle current limit function, short and thermal shutdown protection circuit at 150℃. This chip size is 2190um*1130um includes scribe lane 10um.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.50 no.3
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• pp.141-146
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• 2001

This paper presents a one digital controller two topology PWM DC-DC converter that controls, simultaneously, the separate Buck converter and boost converter with the different specification by using an inexpensive and efficient 8 bit micro-controller. One timer interrupt is used for the detection of output feedback voltage, and other two timer interrupts are used for the generation of PWM waveform for Buck and Boost converter. The control characteristics of one digital controller two topology PWM DC-DC converter is validated by experimental results.

• Journal of the Korean Society of Industry Convergence
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• v.20 no.2
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• pp.97-104
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• 2017

In the present industrial field, the demand for the development of the solar power source device and the charging device for the solar cell is gradually increasing. The solar charger is largely divided into a DC-DC converter that converts the voltage generated from the sunlight to a charging voltage, and a battery and a charger that are charged with an actual battery. The conventional charger topology is used either as a Buck converter or a Boost converter alone, which has the disadvantage that the battery can not always be charged to the desired maximum power as input and output conditions change. Although studies using a topology capable of boosting and stepping have been carried out, Buck-Boost converters or Sepic converters with relatively low efficiency have been used. In this paper, we propose a new Buck Boost combination power converter topology structure that can use Buck converter and Boost converter at the same time to improve inductor current ripple and power converter efficiency caused by wide voltage control range like solar charger.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.6
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• pp.25-32
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• 2011

This paper proposes high efficiency current-mode DC-DC buck converter that are suitable for portable devices. The current-mode DC-DC buck converter using adjustable Dead-time control method improves the power efficiency 2~5%. The buck converter has been implemented with a standard 0.35${\mu}m$ CMOS process. The size of this chip is 0.97$mm^2$. The input range of the fabricated DC-DC buck converter is 2.5V~3.3V, and the output is 1.8V. The maximum loading current of the converter is 500mA and the peak efficiency is 93% at 200mA loads.

• Journal of Power Electronics
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• v.7 no.4
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• pp.318-327
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• 2007

The design and performance analysis of a power factor corrected (PFC), single-phase, single switch flyback buck-boost ac-dc converter is carried out for low power battery charging applications. The proposed configuration of the flyback buck-boost ac-dc converter consists of only one switch and operates in discontinuous current mode (DCM), resulting in simplicity in design and manufacturing and reduction in input current total harmonic distortion (THD). The design procedure of the flyback buck-boost ac-dc converter is presented for the battery charging application. To verify and investigate the design and performance, a simulation study of the flyback buck-boost converter in DCM is performed using the PSIM6.0 platform. A laboratory prototype of the proposed single switch flyback buck-boost ac-dc converter is developed and test results are presented to validate the design and developed model of the system.

• Proceedings of the KIEE Conference
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• 1987.07a
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• pp.824-827
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• 1987

The miniturization of a DC-DC converter circuit in connection with the stability is investigated in this paper. As both the capacitance of the smoothing capacitor and the inductance of the reactor are reduced by raising the switching frequency, it is known that the stability of the buck converter declines with the switching frequency but the buck-boost converter has a nearly uniform stability. Furthermore, that in the frequency region above a certain switching frequency the buck-boost converter is suitable for the miniturization of circuit is cleared.

• Journal of the Korean Society of Industry Convergence
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• v.22 no.3
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• pp.373-379
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• 2019

Nowadays, the IoT portable electronic devices have become more useful and diverse, so they require various supply voltage levels to operate. This paper presents a DC-DC buck converter with pulse width modulation (PWM) for portable electronic devices. The proposed step-down DC-DC converter consists of passive elements such as capacitors, inductors, and resistors and an integrated chip (IC) for signal control to reduce power consumption and improves ripple voltage with the resolution. The proposed DC-DC converter is simulated and analyzed in PSPICE circuit design platform, and implemented on the prototype PCB board with a Texas Instruments LM5165 IC. The proposed buck converter is showed 92.6% of peak efficiency including a load current range of 4-10 mA, 3.29 mV of the voltage ripple at 5 V output voltage for the supply voltage 12 V. Measured and Simulated power efficiency are made good agreement with each other.

• Journal of IKEEE
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• v.17 no.1
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• pp.77-82
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• 2013

In this paper, dc-dc buck converter controled by the peak current-mode pulse-width-modulation (PWM) presented. Based on the small-signal model, we propose the novel methods of the power stage and the systematic stability designs. To improve the reliability and performance, over-temperature and over-current protection circuits have been designed in the dc-dc converter systems. To prevent electrostatic An electrostatic discharge (ESD) protection circuit is proposed. The proposed dc-dc converter circuit exhibits low triggering voltage by using the gate-substrate biasing techniques. Throughout the circuit simulation, it confirms that the proposed ESD protection circuit has lower triggering voltage(4.1V) than that of conventional ggNMOS (8.2V). The circuit simulation is performed by Mathlab and HSPICE programs utilizing the 0.35um BCD (Bipolar-CMOS-DMOS) process parameters.

• Journal of IKEEE
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• v.18 no.4
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• pp.586-592
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• 2014

In this paper, high efficiency power management IC(PMIC) with DT-CMOS(Dynamic threshold voltage Complementary MOSFET) switching device is presented. PMIC is controlled PWM control method in order to have high power efficiency at high current level. The DT-CMOS switch with low on-resistance is designed to decrease conduction loss. The control parts in Buck converter, that is, PWM control circuit consist of a saw-tooth generator, a band-gap reference(BGR) circuit, an error amplifier, comparator circuit, compensation circuit, and control block. The saw-tooth generator is made to have 1.2MHz oscillation frequency and full range of output swing from supply voltage(3.3V) to ground. The comparator is designed with two stage OP amplifier. And the error amplifier has 70dB DC gain and $64^{\circ}$ phase margin. DC-DC converter, based on current mode PWM control circuits and low on-resistance switching device, achieved the high efficiency nearly 96% at 100mA output current. And Buck converter is designed along LDO in standby mode which fewer than 1mA for high efficiency. Also, this paper proposes two protection circuit in order to ensure the reliability.