• 제목/요약/키워드: Boundary potential barrier

검색결과 28건 처리시간 0.032초

N-형 $WO_{3}$계 가스센서의 전기적 특성 (Electrical properties of n-type $WO_{3}$ based gas sensors)

  • 양종인;김일진;임한조;한상도;정관수
    • 센서학회지
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    • 제7권3호
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    • pp.188-196
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    • 1998
  • $WO_{3}$계 n-형 반도체 가스센서의 검지특성 및 전기적 특성을 조사하였다. 공기중에서 결합제가 첨가되지 않은 $WO_{3}:TiO_{2}$(4 wt. %) 센서의 낱알경계에서의 전위장벽의 크기는 0.26 V로 나타났으며, 결합제로서 $Al_{2}O_{3}$, PVA (polyvinyl alcohol ), silica sol이 첨가된 센서의 경우는 전위장벽이 각각 0.17, 0.22, 0.26 V로 관측되었다. 이들 시료를 $NO_{x}$가 120 ppm 첨가된 분위기에 노출시켰을 때, 결합제가 첨가되지 않은 센서의 경우는 낱알경계에서의 전위장벽이 0.59 V로 증가하였으며, 결합제로서 $Al_{2}O_{3}$, PVA, silica sol이 첨가된 경우는 전위장벽이 각각 0.43, 0.66, 0.52 V로 나타나, PVA가 첨가된 센서에서 전위장벽의 변화가 가장 높아 감도가 우수하게 되는 것을 알 수가 있었다. 한편 센서 최적 작동온도 이상의 온도에서 나타나는 감도의 감소는 흡착가스 입자의 탈착보다는 공기중에서 다결정이 보이는 저항의 온도 의존성에 따라 나타남이 판명되었다. 또한 결합제가 첨가되지 않은 센서와 결합제로서 Pt가 첨가된 센서의 경우, CO가 250 ppm 존재할 때까지도 전위장벽의 크기가 약 0.2 V로 공기중에서와 비슷한 크기를 나타내어, CO와 $NO_{x}$가 혼합된 분위기에서 $NO_{x}$만을 선택적으로 검지하는데 유리함이 밝혀졌다.

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Poly-crystalline Silicon Thin Film Transistor: a Two-dimensional Threshold Voltage Analysis using Green's Function Approach

  • Sehgal, Amit;Mangla, Tina;Gupta, Mridula;Gupta, R.S.
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제7권4호
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    • pp.287-298
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    • 2007
  • A two-dimensional treatment of the potential distribution under the depletion approximation is presented for poly-crystalline silicon thin film transistors. Green's function approach is adopted to solve the two-dimensional Poisson's equation. The solution for the potential distribution is derived using Neumann's boundary condition at the silicon-silicon di-oxide interface. The developed model gives insight into device behavior due to the effects of traps and grain-boundaries. Also short-channel effects and drain induced barrier lowering effects are incorporated in the model. The potential distribution and electric field variation with various device parameters is shown. An analysis of threshold voltage is also presented. The results obtained show good agreement with simulated results and numerical modeling based on the finite difference method, thus demonstrating the validity of our model.

Sb2O3 첨가제가 ZnO 배리스터의 전기적 특성에 미치는 영향 (The Effect of Sb2O3 Additive on the Electrical Properties of ZnO Varistor)

  • 김용혁
    • 전기학회논문지
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    • 제65권10호
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    • pp.1697-1701
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    • 2016
  • The leakage conduction and critical voltage characteristic of ZnO ceramic were investigated as a function of $Sb_2O_3$ concentration. Leakage conduction in the ohmic region increased with increasing $Sb_2O_3$ concentration and was attributed to the potential barrier height. The nonlinear coefficient increased with an increasing amount of $Sb_2O_3$. It was found that increases in the apparent critical voltages were associated with the lowered donor concentration in the grain boundary of between two ZnO grains. And the decrease of donor concentration on doping with $Sb_2O_3$ additive was attributed to the lowered capacitance in the grain boundary layer.

Ceramic PTC thermistor의 금속접촉저항과 입계전위장벽 (Analysis on Metal Contact Resistance and Grain Boundary Barrier Height of Ceramic PTC Thermistor)

  • 전용우;임병재;홍상진;소대화
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2006년도 추계학술대회 논문집 Vol.19
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    • pp.235-236
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    • 2006
  • The contact resistance and grain boundary potential barrier of ceramic $BaTiO_3$ PTCR were investigated. The electroless plated Ni, evaporated Al, and Ag paste were chosen as electrode materials of PTCR device for comparison analysis before and after heat treatment. The contact resistance of electrode were measured by electrometer (dc), digital multimeter (dc), and LCR meter (ac). In the case of Al electroded samples, the heat treatment and protective oxide layer had high resistance and effect on the stability of PTCR effect against contact resistance degradation, but the Ag-paste had comparably high contact resistance before heat treatment and decreased after heat treatment with safe. On the other hand, the samples with electroless plated Ni electrode had good properties of contact resistance against aging.

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Analysis of Transport Characteristics for FinFET Using Three Dimension Poisson's Equation

  • Jung, Hak-Kee;Han, Ji-Hyeong
    • Journal of information and communication convergence engineering
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    • 제7권3호
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    • pp.361-365
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    • 2009
  • This paper has been presented the transport characteristics of FinFET using the analytical potential model based on the Poisson's equation in subthreshold and threshold region. The threshold voltage is the most important factor of device design since threshold voltage decides ON/OFF of transistor. We have investigated the variations of threshold voltage and drain induced barrier lowing according to the variation of geometry such as the length, width and thickness of channel. The analytical potential model derived from the three dimensional Poisson's equation has been used since the channel electrostatics under threshold and subthreshold region is governed by the Poisson's equation. The appropriate boundary conditions for source/drain and gates has been also used to solve analytically the three dimensional Poisson's equation. Since the model is validated by comparing with the three dimensional numerical simulation, the subthreshold current is derived from this potential model. The threshold voltage is obtained from calculating the front gate bias when the drain current is $10^{-6}A$.

THE EFFECT OF DOPANT OUTDIFFUSION ON THE NEUTRAL BASE RECOMBINATION CURRENT IN Si/SiGe/Si HETEROJUNCTION BIPOLAR TRANSISTORS

  • Ryum, Byung-R.;Kim, Sung-Ihl
    • ETRI Journal
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    • 제15권3_4호
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    • pp.61-69
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    • 1994
  • A new analytical model for the base current of Si/SiGe/Si heterojunction bipolar transistors(HBTs) has been developed. This model includes the hole injection current from the base to the emitter, and the recombination components in the space charge region(SCR) and the neutral base. Distinctly different from other models, this model includes the following effects on each base current component by using the boundary condition of the excess minority carrier concentration at SCR boundaries: the first is the effect of the parasitic potential barrier which is formed at the Si/SiGe collector-base heterojunction due to the dopant outdiffusion from the SiGe base to the adjacent Si collector, and the second is the Ge composition grading effect. The effectiveness of this model is confirmed by comparing the calculated result with the measured plot of the base current vs. the collector-base bias voltage for the ungraded HBT. The decreasing base current with the increasing the collector-base reverse bias voltage is successfully explained by this model without assuming the short-lifetime region close to the SiGe/Si collector-base junction, where a complete absence of dislocations is confirmed by transmission electron microscopy (TEM)[1].The recombination component in the neutral base region is shown to dominate other components even for HBTs with a thin base, due to the increased carrier storage in the vicinity of the parasitic potential barrier at collector-base heterojunction.

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An Analytical Model for the Threshold Voltage of Short-Channel Double-Material-Gate (DMG) MOSFETs with a Strained-Silicon (s-Si) Channel on Silicon-Germanium (SiGe) Substrates

  • Bhushan, Shiv;Sarangi, Santunu;Gopi, Krishna Saramekala;Santra, Abirmoya;Dubey, Sarvesh;Tiwari, Pramod Kumar
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제13권4호
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    • pp.367-380
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    • 2013
  • In this paper, an analytical threshold voltage model is developed for a short-channel double-material-gate (DMG) strained-silicon (s-Si) on silicon-germanium ($Si_{1-X}Ge_X$) MOSFET structure. The proposed threshold voltage model is based on the so called virtual-cathode potential formulation. The virtual-cathode potential is taken as minimum channel potential along the transverse direction of the channel and is derived from two-dimensional (2D) potential distribution of channel region. The 2D channel potential is formulated by solving the 2D Poisson's equation with suitable boundary conditions in both the strained-Si layer and relaxed $Si_{1-X}Ge_X$ layer. The effects of a number of device parameters like the Ge mole fraction, Si film thickness and gate-length ratio have been considered on threshold voltage. Further, the drain induced barrier lowering (DIBL) has also been analyzed for gate-length ratio and amount of strain variations. The validity of the present 2D analytical model is verified with ATLAS$^{TM}$, a 2D device simulator from Silvaco Inc.

다결정 실리톤의 미세구조와 전기적 특성에 관한 연구 (A study on microstructure and electrical properties of LPCVD polysilicon)

  • 이은구;문대규;정호영
    • E2M - 전기 전자와 첨단 소재
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    • 제5권3호
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    • pp.310-319
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    • 1992
  • LPCVD 방법으로 625.deg.C와 560.deg.에서 증착한 다결정 실리콘에 As이온주입량을 lx$10^{13}$-lx$10^{16}$/$cm^{2}$로 변화시키면서 열처리 전, 후의 미세구조와 전기적 특성 변화를 조사하였다. 625.deg.C에서 증착한 시편은 columnar구조를 하고 있어 표면이 매우 거칠었으며 900.deg.C, 30분 열처리 후에는 As doping 농도에 관계없이 결정립 크기는 200-300.angs.정도였다. 560.deg.C에서 증착한 시편은 비정질 상태로열처리 후에는 1000.angs.이상의 큰 결정립을 갖는 타원형의 결정립으로 성장하였으며 표면이 매우 smooth하였다. 같은 doping 농도에서 전기 전도도와 Hall mobility는 비정질 상태로 증착한 시편이 큰 결정립으로 인하여 다결정 상태로 증착한 시편에 비해 크게 되었다. Grain boundary trapping model에 의해 계산한 potential barrier height는 As doping 농도가 증가함에 따라 감소하였으며 grain boundary trap density는 증착 온도, As doping 농도 및 결정립 크기에 크게 관계없이 3.6~5*$10^{12}$/$cm^{2}$로 측정되었다.

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粒界에서의 터널링으로 解析한 薄膜트랜지스터의 電流-電壓 特性 (I-V Characteristics of the TFT Analyzed by Tunneling in Grain Boundaries)

  • 마대영
    • 대한전자공학회논문지
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    • 제26권6호
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    • pp.23-29
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    • 1989
  • 多結晶 薄膜트랜지스터의 電界效果 解析을 위한 物理的인 모델을 제시하였다. 본 논문의 모델에서는 粒子(grain) 하나를 單結晶 트랜지스터로 粒界(grain boundary)를 電位障壁을 갖는 絶緣體로 가정하였다. 따라서 多結晶 薄膜트랜지스터 粒子인 單結晶 트랜지스터들이 粒界를 경계로 직렬연결 되어 있는 것으로 간주하였으며, 粒子에 흐르는 電流는 gradual channel 근사식으로 또 粒界에 흐르는 電流는 터널링 이론으로 계산하였다. 出力特性과 비교하므로써 채널에서의 電位, 電界분포 등을 구하였으며 이결과들을 통해 본 모델을 검토하였다. 본 논문에서 제시한 다결정박막트랜지스터의 전도모델이 문턱전압이상의 素子동작해석에 타당함을 밝혔다.

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Oscillatory Josephson-Vortex Resistance in Stacks of $Bi_{2}Sr_{2}CaCu_{2}O_{8+x}$ Intrinsic Josephson Junctions

  • 최재현;배명호;이후종;김상제
    • Progress in Superconductivity
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    • 제7권1호
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    • pp.17-21
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    • 2005
  • We report the oscillation of the Josephson vortex-flow resistance in the rectangular stacks of $Bi_{2}Sr_{2}CaCu_{2}O_{8+x}$(Bi-2212) intrinsic Josephson junctions (IJJs). Apiece of Bi-2212 single crystal containing a few tens of IJJs was sandwiched between two gold electrodes and fabricated into a rectangular shape with the typical lateral size of about $1.5{\times}10\;{\mu}m^2$, using e-beam lithography and focused ion-beam etching techniques. In a tesla-range magnetic field applied in parallel with the junction planes, the oscillation of the Josephson vortex flow resistance was observed at temperatures near 60 K. The oscillation results from the interplay between the triangular Josephson vortex lattice and the potential barrier at the boundary of a single crystal. The oscillatory magnetoresistance for different bias currents, external magnetic fields, and the tilt-angles provides useful information on the dynamics of the coupled Josephson-vortex lattice system.

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