• 대한음성학회지:말소리
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• 제51호
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• pp.85-98
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• 2004

It is almost impossible to generate the sound field effect in real time with the time-domain linear convolution because of its large multiplication operation requirement. To solve this, three methods are introduced to reduce the number of multiplication operations in this paper. Firstly, the time-domain linear convolution is replaced with the frequency-domain circular convolution. In other words, the linear convolution result can be derived from that of the circular convolution. This technique reduces the number of multiplication operations remarkably, Secondly, a subframe concept is introduced, i.e., one original frame is divided into several subframes. Then the FFT is executed for each subframe and, as a result, the number of multiplication operations can be reduced. Finally, the QFT is used in stead of the FFT. By combining all the above three methods into our final the SFE generation algorithm, the number of computations are reduced sufficiently and the real-time SFE generation becomes possible with a general PC.

• 한국정보기술응용학회:학술대회논문집
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• 한국정보기술응용학회 2005년도 6th 2005 International Conference on Computers, Communications and System
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• pp.195-198
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• 2005

UWB is the most spotlighted wireless technology that transmits data at very high rates using low power over a wide spectrum of frequency band. UWB technology makes it possible to transmit data at rate over 100Mbps within 10 meters. To preserve important header information, MBOFDM UWB adopts Reed-Solomon(23,17) code. In receiver, RS decoder needs high speed and low latency using efficient hardware. In this paper, we suggest the architecture of RS decoder for MBOFDM UWB. We adopts Modified-Euclidean algorithm for key equation solver block which is most complex in area. We suggest pipelined processing cell for this block and show the detailed architecture of syndrome, Chien search and Forney algorithm block. At last, we show the hardware implementation results of RS decoder for ASIC implementation.

• The Korean Journal of Pain
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• 제18권2호
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• pp.208-209
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• 2005

Interstitial cystitis is an extremely painful and distressing condition, characterized by severe suprapubic pain, which increases with bladder filling and is relieved by voiding. The daily frequency of micturition may approach 100 times, but no incontinence is observed. The symptoms persist throughout the night, which consequently affects sleep. The etiology of this condition is still unknown, but includes infection, autoimmune response, allergic reaction, neurogenic inflammation, epithelial dysfunction and inherited susceptibility. Herein, a case of interstitial cystitis, with severe symptoms, which was successfully treated with lumbar sympathetic block, is reported.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 추계종합학술대회 논문집
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• pp.577-580
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• 1999

Padding is a technique that enables applying conventional discrete cosine transform to encode boundary blocks of arbitrarily shaped objects by assigning imaginary values to the pixels that are not included in the object. Padding prevents the increase of high frequency DCT coefficients. However, in some boundary blocks, too many padded pixels are coded due to a small portion of object pixels. To reduce the number of padded pixels and to improve coding efficiency, we propose a block merging method for texture coding. The proposed mothed searches the shape information of boundary blocks and excludes the 4$\times$4 pixels of 8$\times$8 blocks if all the 4$\times$4 pixels are in the background region, and merges the remained 4$\times$4 pixels into new 8$\times$8 blocks. Experimental results show that our proposed method yields a rate-distortion gain about 0.5~1.6㏈ compared to conventional padding method, LPE

• 전자공학회논문지B
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• 제31B권9호
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• pp.76-84
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• 1994

This paper presents a new high-performance VLSI architecture and VLSI implementation for full-search block matching algorithm. The proposed VLSI architecture has the feature of two directional parallel and pipeline processing, thereby reducing the PE idle time at which the direction of block matching operation within the search area is changed. Therfore, the proposed architecture is faster than the existing architectures under the same clock frequency. Based on HSPICE circuit simulation, it is verified that the implemented procesing element is operated successfully within 13 ns for 75 MHz operation.

• 한국방송∙미디어공학회:학술대회논문집
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• 한국방송공학회 1997년도 Proceedings International Workshop on New Video Media Technology
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• pp.25-29
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• 1997

The present block-based DCT encoder transforms images regardless of layers and then simply partitions the transformed data into a few layers, for example low and high frequency bands in JPEG. Yet, it fails to utilize the similarity of coefficients in each band. Therefore, we combine the subband coder and the block-based DCt coder in this paper. The new coding scheme enables the data to automatically be classified into several layers and increases the efficiency of transform. Various possible coding structures are investigated and the simulation results are also provided.

• 한국지능시스템학회논문지
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• 제12권5호
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• pp.424-431
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• 2002

본 논문은 블록기반 DCT 부호화기의 성능 검증에 필수적인 부호화된 영상의 열화 정도를 측정하는 새로운 정량적 화질평가 모델은 제안한다. 제안된 모델은 HVS 기반의 다채널 시각 모델을 이용하여 영상신호에 있어서의 주파수 민감도와 채널의 마스킹 효과를 고려한 공간 영역상의 전반적인 왜곡의 가시도 뿐만 아니라 블록기반 DCT 부호화에서 발생할 수 있는 구획화 현상, 번짐, ringing 등의 국부적인 왜곡 특성을 측정하여 이를 화질 열화 특성에 반영하였다.

• 한국통신학회논문지
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• 제33권9A호
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• pp.867-873
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• 2008

Cyclic delay diversity (CDD) is considered as a simple approach to exploit the frequency diversity in OFDM system. In this paper, we apply CDD to the conventional STBC/SFBC/STFBC-OFDM transmit diversity schemes for Rayleigh fading channels. We compare the performances of STBC/SFBC/STFBC with and without CDD schemes. Simulation results show that the combination of block coding with CDD works well when using the ITU-R M. 1225 channel for both Pedestrian A (Ped A) channel with the mobility of 3 km/h, and Vehicular A (Veh A) channel with the mobility of 120km/h. For a BER of $10^{-3}$, compared to the conventional block coding schemes, a gain of 2dB, 4dB, and 5dB is obtained under the Ped A channel environment by STBC-OFDM, SFBC-OFDM and STFBC-OFDM with CDD, respectively Under the Veh A channel. gains by the combined schemes are 6dB, 2dB, and 4dB, respectivcly.

• 대한전기학회논문지:시스템및제어부문D
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• 제53권6호
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• pp.440-445
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• 2004

The design and implementation of a Network Processor using System-on-a-chip(SoC) technology is presented. The proposed network processor can handle several protocols as well as various types of traffics simultaneously. The proposed SoC consists of ARM processor core, ATM block, AAL processing block, Ethernet block and a scheduler. The scheduler guarantees QoS of the voice traffic and supports multiple AAL2 packet. The SoC is manufactured on the 0.35 micron fabrication line of HYNIX semiconductor, the total number of gates is about 312,000, for a maximum operating frequency of over to 50㎒.

• 디지털산업정보학회논문지
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• 제13권2호
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• pp.63-69
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• 2017

The extraction of attention NPC in a FPS game has emerged as a very significant issue. We propose an efficient FPS game operation method, using the attention NPC extraction with a simple arithmetic. First, we define the NPC, using the color histogram interaction and texture similarity in the block to determine the attention NPC. Next, we use the histogram of movement distribution and frequency of movement of the NPC. Becasue, except for the block boundary according to the texture and to extract only the boundaries of the object block. The edge strength is defined to have high values at the NPC object boundaries, while it is designed to have relatively low values at the NPC texture boundaries or in interior of a region. The region merging method also adopts the color histogram intersection technique in order to use color distribution in each region. Through the experiment, we confirmed that NPC has played a crucial role in the FPS game and as a result it draws more speed and strategic actions in the game.