• Title/Summary/Keyword: Block code generation

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Monitoring of Machining State in Turning by Means of Information and Feed Motor Current (NC 정보와 이송축 모터 전류를 이용한 선삭 가공 상태 감시)

  • 안중환;김화영
    • Transactions of the Korean Society of Mechanical Engineers
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    • v.16 no.1
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    • pp.156-161
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    • 1992
  • In this research a monitoring system for turning using NC information and the current of feed motor as a monitoring signal was developed. The overall system consists of modules such as learning process, NC data transmission, generation of forecast information, signal acquisition, monitoring and post process. In the learning process, the reference data and the cutting force equation necessary for monitoring are obtained from the accumulated monitoring results. In the generation of forecast information, the information of forecasted cutting forces is acquired from the cutting force equation and NC program and appended to each NC block as a monitor code. Reliability of monitoring is improved by using the monitor code in the real-time monitoring. Monitoring module is divided into two parts : the off-line monitoring where errors of NC program are checked and the on-line monitoring where the level of motor current is monitored during cutting operations. If the actual current level exceeds the limit value provided by the monitor code in the level monitoring, it is recognized as abnormal. In the event of abnormal status, the post processor sends the emergency stop signal to NC controller to stop the operation. Actual experiments have shown that the developed monitoring system works well.

A Design of Turbo Decoder using MAP Algorithm (MAP 알고리즘을 이용한 터보 복호화기 설계)

  • 권순녀;이윤현
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.7 no.8
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    • pp.1854-1863
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    • 2003
  • In the recent digital communication systems, the performance of Turbo Code using the mr correction coding depends on the interleaver influencing the free distance determination and the recursive decoding algorithms that is executed in the huh decoder. However, performance depends on the interleaver depth that needs many delays over the reception process. Moreover, turbo code has been blown as the robust coding methods with the confidence over the fading channel. International Telecommunication Union(ITU) has recently adopted it as the standardization of the channel coding over the third generation mobile communications(IMT­2000). Therefore, in this paper, we preposed the interleaver that has the better performance than existing block interleaver, and modified turbo decoder that has the parallel concatenated structure using MAP algorithm. In the real­time voice and video service over third generation mobile communications, the performance of the proposed two methods was analyzed and compared with the existing methods by computer simulation in terms of reduced decoding delay using the variable decoding method over AWGN and fading channels for CDMA environments.

Model Based Design and Validation of Control Systems using Real-time Operating System (실시간 운영체제를 적용한 제어시스템의 모델기반 설계 및 검증)

  • Youn, Jea-Myoung;Ma, Joo-Young;SunWoo, Myoung-Ho;Lee, Woo-Taik
    • Transactions of the Korean Society of Automotive Engineers
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    • v.16 no.2
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    • pp.8-17
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    • 2008
  • This paper presents the Matlab/Simulink-based software-in-the-loop simulation(SILS) environment which is the co-simulator for temporal and functional simulations of control systems. The temporal behavior of a control system is strongly dependent on the implemented software and hardware such as the real-time operating system, the target CPU, and the communication protocol. The proposed SILS abstracts the system with tasks, task executions, real-time schedulers, and real-time networks close to the implementation. Methods to realize these components in graphical block representations are investigated with Matlab/Simulink, which is most commonly used tool for designing and simulating control algorithms in control engineering. In order to achieve a seamless development from SILS to rapid control prototyping (RCP), the SILS block-set is designed to support automatic code generation without tool changes and block modifications.

Secondary Residual Transform for Lossless Intra Coding in HEVC (제 2차 잔차 변환을 이용한 HEVC 무손실 인트라 코딩)

  • Kwak, Jae-Hee;Lee, Yung-Lyul
    • Journal of Broadcast Engineering
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    • v.17 no.5
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    • pp.734-741
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    • 2012
  • A new lossless intra coding method based on residual transform is applied to the next generation video coding standard HEVC (High Efficiency Video Coding). HEVC includes a multi-directional spatial prediction method to reduce spatial redundancy by using neighboring samples as a prediction for the samples in a block of data to be encoded. In the new lossless intra coding method, the spatial prediction is performed as samplewise DPCM (Difference Pulse Code Modulation) but is implemented as block-based manner by using residual transform and secondary residual transform on the HEVC standard. Experimental results show that the new lossless intra coding method reduces the bit rate by approximately 6.45% in comparison with the lossless intra coding method previously included in the HEVC standard.

Improvement of Normalized CMA Channel Equalization and Turbo Code for DS-CDMA System (DS-CDMA 시스템을 위한 터보 부호와 정규화 CMA 채널 등화 개선)

  • 박노진;강철호
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.7A
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    • pp.659-667
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    • 2002
  • In this dissertation, in the Turbo Code used for error correction coding of the recent digital communication systems, we propose a new S-R interleaver that has the better performance than the existing block interleaver, and the Turbo Decoder that has the parallel concatenated New structure using the MAP algorithm. For real-time voice and video services over the third generation mobile communications, the performance of two proposed methods is analyzed by the reduced decoding delay using the variable decoding method by computer simulation over multipath channels of DS-CDMA system. Also, a Modified NCMA based on conventional NCMA is proposed to improve the channel efficiency in the mobile communication system, and is investigated over the multi-user environment of DS-CDMA system through computer simulation.

FracSys와 UDEC을 이용한 사면 파괴 양상 분석 통계적 절리망 생성 기법 및 Monte Carlo Simulation을 통한 사면 안정성 해석

  • 김태희;최재원;윤운상;김춘식
    • Proceedings of the Korean Geotechical Society Conference
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    • 2002.03a
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    • pp.651-656
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    • 2002
  • In general, the most important problem in slope stability analysis is that there is no definite way to describe the natural three-dimensional Joint network. Therefore, the many approaches were tried to anlayze the slope stability. Numerical modeling approach is one of the branch to resolve the complexity of natural system. UDEC, FLAC, and SWEDGE are widely used commercial code for the purpose on stability analysis. For the purpose on the more appropriate application of these kind of code, however, three-dimensional distribution of joint network must be identified in more explicit way. Remaining problem is to definitely describe the three dimensional network of joint and bedding, but it is almost impossible in practical sense. Three dimensional joint generation method with random number generation and the results of generation to UDEC have been applied to settle the refered problems in field site. However, this approach also has a important problem, and it is that joint network is generated only once. This problem lead to the limitation on the application to field case, in practical sense. To get rid of this limitation, Monte Carlo Simulation is proposed in this study 1) statistical analysis of input values and definition of the applied system with statistical parameter, 2) instead of the consideration of generated network as a real system, generated system is just taken as one reliable system, 3) present the design parameters, through the statistical analysis of ouput values Results of this study are not only the probability of failure, but also area of failure block, shear strength, normal strength and failure pattern, and all of these results are described in statistical parameters. The results of this study, shear strength, failure area, pattern etc, can provide the direct basement on the design, cutoff angle, support pattern, support strength and etc.

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FPGA-Based Post-Quantum Cryptography Hardware Accelerator Design using High Level Synthesis (HLS 를 이용한 FPGA 기반 양자내성암호 하드웨어 가속기 설계)

  • Haesung Jung;Hanyoung Lee;Hanho Lee
    • Transactions on Semiconductor Engineering
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    • v.1 no.1
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    • pp.1-8
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    • 2023
  • This paper presents the design and implementation of Crystals-Kyber, a next-generation postquantum cryptography, as a hardware accelerator on an FPGA using High-Level Synthesis (HLS). We optimized the Crystals-Kyber algorithm using various directives provided by Vitis HLS, configured the AXI interface, and designed a hardware accelerator that can be implemented on an FPGA. Then, we used Vivado tool to design the IP block and implement it on the ZYNQ ZCU106 FPGA. Finally, the video was recorded and H.264 compressed with Python code in the PYNQ framework, and the video encryption and decryption were accelerated using Crystals-Kyber hardware accelerator implemented on the FPGA.

Performance Analysis of CZZ Codes Using Degree-2 Polynomial Interleavers for Fading Channels (페이딩 채널에서 2차 다항식 인터리버를 사용한 CZZ 부호의 성능 분석)

  • Yun, Jeong-Kook;Yoo, Chul-Hae;Shin, Dong-Joon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.33 no.12C
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    • pp.1006-1013
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    • 2008
  • CZZ (Concatenated Zigzag) Code is a class of fast encodable LDPC codes. In the case that LDPC codes including CZZ codes have short length, short cycles seriously affect the code performance. In this paper, we construct CZZ codes using various degree-2 polynomial interleavers which eliminate cycles of length 4 and through simulation, compare the performance of these CZZ codes and turbo codes in many different fading channels. Especially, quasi-static fading channel, block fading channel, uncorrelated fading channel, and correlated fading channel are considered. Since CZZ codes show similar performance as turbo codes, they can be used in the next generation wireless communication systems.

A variable replication technique for improving multiple load/store code generation (복수 로드/스토어 명령어 생성 개선을 위한 변수 복사 기법)

  • Cho, Doo-San;Kim, Chan-Hyuk;Paek, Yun-Heung
    • Proceedings of the Korean Information Science Society Conference
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    • 2011.06b
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    • pp.338-341
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    • 2011
  • 프로그램 코드 사이즈는 내장형시스템 구성에 있어서 고려해야 할 핵심 요소중의 하나이다. 프로그램 사이즈는 해당 시스템의 메모리 크기, 전력소모, 성능, 가격 등에 영향을 미치기 때문이다. 프로그램 코드 사이즈를 최적화하기 위하여 활용할 수 있는 시스템 자원 중에서 효과적인 것 중 하나가 복수 로드/스토어 명령어(Multiple Load/Store Instruction, MLS)이다. MLS 명령어는 하나의 명령어로 하나이상의 메모리 값을 레지스터로 블록 전송 (block transfer)하는 것이 가능하기 때문이다. 본 연구에서는 MLS명령어를 기존보다 효과적으로 생성함으로써 코드 크기를 감소시키는 최적화 기법에 대해 논의한다. 실험을 통하여 Mediabench와 DSPStone 벤치마크에서 본 연구에서 제안하는 기법을 통하여 평균 메모리 접근 코드사이즈가 10.3% 감소하였다.

IMPLEMENTATION OF FULL WEB-BASED GRAPHIC USER INTERFACE PROCESSOR FOR CFD SOFTWARE (웹 기반 CFD s/w용 GUI 프로세서의 구현)

  • Juraeva Makhsuda;Ivanov Evgeny G.;Song Dong Joo
    • 한국전산유체공학회:학술대회논문집
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    • 2004.10a
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    • pp.121-125
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    • 2004
  • The preprocessor - solver - postprocessor software for 2D/Axisymmetric CSCM Upwind Flux Difference Splitting Navier-Stokes code has been developed for undergraduate educational purpose. This computational fluid dynamics (CFD) software allows students to setup, solve, visualize and control dynamically server for their own fluid problems via Internet. The preprocessor Is capable of generating geometry and grid, initial solution data and required solver control parameters. The postprocessor shows vector plot and contour plot with different options while residual plot shows root-mean-square (RMS) error history graphically and retrieves the data from solver interactively. Special feature of the preprocessor is grid generation part which is based on MFC/Visual C++ application and FORTRAN single block grid generator process. Many users can access solver via Internet from client computers and solve desired problems using locally installed pre- and postprocessor and remote powerful solver part.

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