• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.2A
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• pp.86-95
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• 2003

With the advent of future mobile communication systems, the wireless transmission of the huge amount of multimedia data over the error-prone multipath fading channel has to overcome the inherent sensitivity to channel errors. To alleviate the effect of the channel errors, hosts of techniques based on the forward error correction(FEC) has been proposed at the cost of overhead rate. Among the FEC techniques, turbo code, whose performance has been shown to be very close to the Shannon limit, can be classified as a block-based error correction code. In this paper, considering the variable packet size of the multimedia data, we analyzed turbo codes employing the variable-sized interleaver. The effect of the various parameters on the BER performance is analyzed. We show that the turbo codes can be used as efficient error correction codes of multimedia data.

• 한국정보통신설비학회:학술대회논문집
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• 2005.08a
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• pp.417-421
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• 2005

In the recent digital communication systems, the performance of Turbo Code using the error correction coding depends on the interleaver influencing the free distance determination and the recursive decoding algorithms that is executed in the turbo decoder. However, performance depends on the interleaver depth that needs many delays over the reception process. Moreover, turbo code has been known as the robust coding methods with the confidence over the fading channel. International Telecommunication Union(ITU) has recently adopted it as the standardization of the channel coding over the third generation mobile communications(IMT-2000). Therefore, in this paper, we proposed the interleaver that has the better performance than existing block interleaver, and modified turbo decoder that has the parallel concatenated structure using MAP algorithm. In the real-time voice and video service over third generation mobile communications, the performance of the proposed two methods was analyzed and compared with the existing methods by computer simulation in terms of reduced decoding delay using the variable decoding method over AWGN and fading channels for CDMA environments.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.1
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• pp.81-88
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• 2004

Turbo code has been adopted in the 3GPP standard, since its performance is very close to the Shannon limit. However, the turbo decoder requires a lot of computations and the amount of the memory increases as the block size of turbo codes becomes larger. In order to reduce the complexity of the turbo decoder, the Log-MAP, the Max-Log-MAP and the sliding window algorithm have been proposed. In this paper, the performance of turbo codes adopted in the 3GPP standard is analyzed by using the floating point and the fixed point implementation. The efficient decoding method is also proposed. It is shown that the BER performance of the proposed method is close to that of the Log-MAP algorithm.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2011.07a
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• pp.268-271
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• 2011

본 논문에서는 지상파 3D HDTV 방송 서비스를 제공하기 위하여 기존의 유럽형 HDTV 방송 서비스인 DVB-T2 전송 시스템의 채널 부호군을 연구하고, 이 시스템의 외부 부호(Outer Code)로 쓰이는 BCH 부호의 경판정(Hard Decision)을 통한 복호를 연판정(Soft Decision)을 통한 복호로 수정함으로써 성능에 미치는 영향에 대해 살펴보았다. 또한 기존의 DVB-T2 전송시스템의 성능을 살펴보고, 이를 바탕으로 기존의 외부 부호(Outer Code)인 BCH 부호와 내부 부호(Inner Code)인 LDPC 부호의 조합을 연판정이 가능하고 복호하는 블록(Block)의 길이가 더 짧아진 BTC(Block Turbo Code)부호와 LDPC 부호와의 조합으로 바꿈으로써 기존의 DVB-T2 전송 시스템보다 블록 오류율이 낮아짐을 확인하였다.

• The Transactions of the Korea Information Processing Society
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• v.7 no.2
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• pp.536-541
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• 2000

Turbo code has excellent decoding performance but had limitations for real time communications because of the system complexity and time delay in decoding procedure. To overcome this problem, a new SRI(Semi-Random Interleaver) algorithm which realize the reduction of the interleaver size is proposed for reducing the time delay during the decoding prodedure. SRI compose the interleaver 0.5 size from the input data sequence. In writing the interleaver, data is recorded by row such as block interleaver. But, in reading, data is read by randomly and the text data is located by the just address simultaneously. Therefore, the processing time of with the preexisting method such as block, helical random interleaver.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.5A
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• pp.402-406
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• 2005

A multiple input multiple output orthogonal frequency division multiplexing (MIMO-OFDM) system using low-density parity-check (LDPC) code and iterative decoding is presented. The iterative decoding is performed by combining the zero-forcing technique and LDPC decoding through the use of the 'turbo principle.' The proposed system is shown to be effective with high order modulation and outperforms the space frequency block code (SFBC) method with iterative decoding.

• ETRI Journal
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• v.27 no.5
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• pp.525-532
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• 2005

In this paper, we propose and present implementation results of a high-speed turbo decoding algorithm. The latency caused by (de)interleaving and iterative decoding in a conventional maximum a posteriori turbo decoder can be dramatically reduced with the proposed design. The source of the latency reduction is from the combination of the radix-4, center to top, parallel decoding, and early-stop algorithms. This reduced latency enables the use of the turbo decoder as a forward error correction scheme in real-time wireless communication services. The proposed scheme results in a slight degradation in bit error rate performance for large block sizes because the effective interleaver size in a radix-4 implementation is reduced to half, relative to the conventional method. To prove the latency reduction, we implemented the proposed scheme on a field-programmable gate array and compared its decoding speed with that of a conventional decoder. The results show an improvement of at least five fold for a single iteration of turbo decoding.

• Journal of electromagnetic engineering and science
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• v.6 no.3
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• pp.147-154
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• 2006

In this paper, we propose and present implementation results of a high-speed turbo decoding algorithm. The latency caused by (de) interleaving and iterative decoding in a conventional maximum a posteriori(MAP) turbo decoder can be dramatically reduced with the proposed design. The source of the latency reduction is come from the combination of the radix-4, dual-path processing, parallel decoding, and rearly-stop algorithms. This reduced latency enables the use of the turbo decoder as a forward error correction scheme in real-time wireless communication services. The proposed scheme results in a slight degradation in bit-error rate(BER) performance for large block sizes because the effective interleaver size in a radix-4 implementation is reduced to half, relative to the conventional method. Fixed on the parameters of N=212, iteration=3, 8-states, 3 iterations, and QPSK modulation scheme, we designed the adaptive high-speed turbo decoder using the Xilinx chip (VIRTEX2P (XC2VP30-5FG676)) with the speed of 17.78 Mb/s. From the results, we confirmed that the decoding speed of the proposed decoder is faster than conventional algorithms by 8 times.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.5A
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• pp.423-430
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• 2010

The performances of turbo-coded space-time block coding (STBC) schemes are subject to how soft decision detection (SDD) information are generated from the STBC decoder. For this reason, we have to pay particular attention to estimation of SDD. In this paper, we evaluate the performance of a turbo coded STBC scheme depending on the accuracy of the SDD. Recently, a new quasi orthogonal STBC (QO-STBC) scheme using a noise whitened filter was proposed in order to reduce noise enhancing effect of zero forcing detection process. This QO-STBC scheme was proven to be efficient in computational complexity compared to the other conventional QO-STBC schemes. In this paper, we first present detailed mathematical analysis on the noise whitened QO-STBC scheme, and by using the result we propose the optimum SDD method.

• The KIPS Transactions:PartC
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• v.10C no.2
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• pp.233-240
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• 2003

In this paper, an improved architecture of turbo codec for IMT-2000 is proposed. The encoder consists of an interleaver using an on-the-fly type address generator and a modified shift register instead of an external RAM, and the decoder uses a decreased number of RAM. The proposed architecture is simulated with C/VHDL languages, where BER (bit-error-rate) performances are generally in agreement with previous data by varying interaction numbers, interleaver block sizes and code rates.