• Title/Summary/Keyword: Block Motion Estimation

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AMSEA: Advanced Multi-level Successive Elimination Algorithms for Motion Estimation (움직임 추정을 위한 개선된 다단계 연속 제거 알고리즘)

  • Jung, Soo-Mok;Park, Myong-Soon
    • Journal of KIISE:Software and Applications
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    • v.29 no.1_2
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    • pp.98-113
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    • 2002
  • In this paper, we present advanced algorithms to reduce the computations of block matching algorithms for motion estimation in video coding. Advanced multi-level successive elimination algorithms(AMSEA) are based on the Multi-level successive elimination algorithm(MSEA)[1]. The first algorithm is that when we calculate the sum of absolute difference (SAD) between the sum norms of sub-blocks in MSEA, we use the partial distortion elimination technique. By using the first algorithm, we can reduce the computations of MSEA further. In the second algorithm, we calculate SAD adaptively from large value to small value according to the absolute difference values between pixels of blocks. By using the second algorithm, the partial distortion elimination in SAD calculation can occur early. So, the computations of MSEA can be reduced. In the third algorithm, we can estimate the elimination level of MSEA. Accordingly, the computations of the MSEA related to the level lower than the estimated level can be reduced. The fourth algorithm is a very fast block matching algorithm with nearly 100% motion estimation accuracy. Experimental results show that AMSEA are very efficient algorithms for the estimation of motion vectors.

Reconstruction of HR by POCS and Regularized Block Matching (정규화된 블록매칭과 POCS에 의한 HR 영상 재구성)

  • Choi Jong-Beom;Oh Tae-Seok;Kim Yong Cheo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.8C
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    • pp.824-831
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    • 2005
  • In the reconstruction of high resolution (HR) images from low resolution (LR) images frames, the error in the estimated motion degrades the reliability of the reconstructed HR image. Some methods were recently proposed where motion estimation and HR reconstruction is performed simultaneously. The estimated motion is still prone to error when it is based on a simple block matching. In this paper, we propose a reconstruction of a HR image by applying POCS and a regularized block matching simultaneously. In this method, a motion vector is obtained from a regularized block matching algorithm since the motion of a pixel in an image is highly correlated with the motion in neighboring regions. Experimental results show that the improved accuracy of the estimated motion vectors results in higher PSNR of the reconstructed HR images.

Error Concealment Algorithm Using Lagrange Interpolation For H.264/AVC (RTP/IP 기반의 네트워크 전송 환경에서 라그랑제 보간법을 이용한 에러 은닉 기법)

  • Jung, Hak-Jae;Ahn, Do-Rang;Lee, Dong-Wook
    • Proceedings of the KIEE Conference
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    • 2005.05a
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    • pp.161-163
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    • 2005
  • In this paper, we propose an efficient motion vector recovery algorithm for the new coding standard H.264, which makes use of the Lagrange interpolation formula. In H.264/AVC, a 16$\times$16 macroblock can be divided into different block shapes for motion estimation, and each block has its own motion vector. In the natural video the motion vector is likely to move in the same direction, hence the neighboring motion vectors are correlative. Because the motion vector in H.264 covers smaller area than previous coding standards, the correlation between neighboring motion vectors increases. We can use the Lagrange interpolation formula to constitute a polynomial that describes the motion tendency of motion vectors, and use this polynomial to recover the lost motion vector. The simulation result shows that our algorithm can efficiently improve the visual quality of the corrupted video.

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Fast mode decision by skipping variable block-based motion estimation and spatial predictive coding in H.264 (H.264의 가변 블록 크기 움직임 추정 및 공간 예측 부호화 생략에 의한 고속 모드 결정법)

  • 한기훈;이영렬
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.40 no.5
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    • pp.417-425
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    • 2003
  • H.264, which is the latest video coding standard of both ITU-T(International Telecommunication Union-Telecommunication standardization sector) and MPEG(Moving Picture Experts Group), adopts new video coding tools such as variable block size motion estimation, multiple reference frames, quarter-pel motion estimation/compensation(ME/MC), 4${\times}$4 Integer DCT(Discrete Cosine Transform), and Rate-Distortion Optimization, etc. These new video coding tools provide good coding of efficiency compared with existing video coding standards as H.263, MPEG-4, etc. However, these new coding tools require the increase of encoder complexity. Therefore, in order to apply H.264 to many real applications, fast algorithms are required for H.264 coding tools. In this paper, when encoder MacroBlock(MB) mode is decided by rate-distortion optimization tool, fast mode decision algorithm by skipping variable block size ME/MC and spatial-predictive coding, which occupies most encoder complexity, is proposed. In terms of computational complexity, the proposed method runs about 4 times as far as JM(Joint Model) 42 encoder of H.264, while the PSNR(peak signal-to-noise ratio)s of the decoded images are maintained.

A Fast Motion Vector Search in Integer Pixel Unit for Variable Blocks Siz (가변 크기 블록에서 정수단위 화소 움직임 벡터의 빠른 검색)

  • 이융기;이영렬
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.40 no.5
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    • pp.388-396
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    • 2003
  • In this paper, a fast motion search algorithm that performs motion search for variable blocks in integer pixel unit is proposed. The proposed method is based on the successive elimination algorithm (SEA) using sum norms to find the best estimate of motion vector and obtains the best estimate of the motion vectors of blocks, including 16${\times}$8, 8${\times}$16, and 8${\times}$8, by searching eight pixels around the best motion vector of 16${\times}$16 block obtained from all candidates. And the motion vectors of blocks, including 8${\times}$4, 4${\times}$8, and 4${\times}$4, is obtained by searching eight pixels around the best motion vector of 8${\times}$8 block. The proposed motion search is applied to the H.264 encoder that performs variable blocks motion estimation (ME). In terms of computational complexity, the proposed search algorithm for motion estimation (ME) calculates motion vectors in about 23.8 times speed compared with the spiral full search without early termination and 4.6 times speed compared with the motion estimation method using hierarchical sum of absolute difference (SAD) of 4${\times}$4 blocks, while it shows 0.1dB∼0.4dB peak signal-to-noise ratio (PSNR) drop in comparison to the spiral full search.

The Design of Repeated Motion on Adaptive Block Matching Algorithm in Real-Time Image (실시간 영상에서 반복적인 움직임에 적응한 블록정합 알고리즘 설계)

  • Kim Jang-Hyung;Kang Jin-Suk
    • Journal of Korea Multimedia Society
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    • v.8 no.3
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    • pp.345-354
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    • 2005
  • Since motion estimation and motion compensation methods remove the redundant data to employ the temporal redundancy in images, it plays an important role in digital video compression. Because of its high computational complexity, however, it is difficult to apply to high-resolution applications in real time environments. If we have a priori knowledge about the motion of an image block before the motion estimation, the location of a better starting point for the search of an exact motion vector can be determined to expedite the searching process. In this paper presents the motion detection algorithm that can run robustly about recusive motion. The motion detection compares and analyzes two frames each other, motion of whether happened judge. Through experiments, we show significant improvements in the reduction of the computational time in terms of the number of search steps without much quality degradation in the predicted image.

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Low Complexity Motion Estimation Based on Spatio - Temporal Correlations (시간적-공간적 상관성을 이용한 저 복잡도 움직임 추정)

  • Yoon Hyo-Sun;Kim Mi-Young;Lee Guee-Sang
    • Journal of KIISE:Software and Applications
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    • v.31 no.9
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    • pp.1142-1149
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    • 2004
  • Motion Estimation(ME) has been developed to reduce temporal redundancy in digital video signals and increase data compression ratio. ME is an Important part of video encoding systems, since it can significantly affect the output quality of encoded sequences. However, ME requires high computational complexity, it is difficult to apply to real time video transmission. for this reason, motion estimation algorithms with low computational complexity are viable solutions. In this paper, we present an efficient method with low computational complexity based on spatial and temporal correlations of motion vectors. The proposed method uses temporally and spatially correlated motion information, the motion vector of the block with the same coordinate in the reference frame and the motion vectors of neighboring blocks around the current block in the current frame, to decide the search pattern and the location of search starting point adaptively. Experiments show that the image quality improvement of the proposed method over MVFAST (Motion Vector Field Adaptive Search Technique) and PMVFAST (Predictive Motion Vector Field Adaptive Search Technique) is 0.01~0.3(dB) better and the speedup improvement is about 1.12~l.33 times faster which resulted from lower computational complexity.

A real-time high speed full search block matching motion estimation processor (고속 실시간 처리 full search block matching 움직임 추정 프로세서)

  • 유재희;김준호
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.12
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    • pp.110-119
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    • 1996
  • A novel high speed VLSI architecture and its VLSI realization methodologies for a motion estimation processor based on full search block matching algorithm are presentd. The presented architecture is designed in order to be suitable for highly parallel and pipelined processing with identical PE's and adjustable in performance and hardware amount according to various application areas. Also, the throughput is maximized by enhancing PE utilization up to 100% and the chip pin count is reduced by reusing image data with embedded image memories. Also, the uniform and identical data processing structure of PE's eases VLSI implementation and the clock rate of external I/O data can be made slower compared to internal clock rate to resolve I/O bottleneck problem. The logic and spice simulation results of the proposed architecture are presented. The performances of the proposed architecture are evaluated and compared with other architectures. Finally, the chip layout is shown.

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Active Object Tracking using Image Mosaic Background

  • Jung, Young-Kee;Woo, Dong-Min
    • Journal of information and communication convergence engineering
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    • v.2 no.1
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    • pp.52-57
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    • 2004
  • In this paper, we propose a panorama-based object tracking scheme for wide-view surveillance systems that can detect and track moving objects with a pan-tilt camera. A dynamic mosaic of the background is progressively integrated in a single image using the camera motion information. For the camera motion estimation, we calculate affine motion parameters for each frame sequentially with respect to its previous frame. The camera motion is robustly estimated on the background by discriminating between background and foreground regions. The modified block-based motion estimation is used to separate the background region. Each moving object is segmented by image subtraction from the mosaic background. The proposed tracking system has demonstrated good performance for several test video sequences.

A Novel Spiral-Type Motion Estimation Architecture for H.264/AVC

  • Hirai, Naoyuki;Song, Tian;Liu, Yizhong;Shimamoto, Takashi
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.10 no.1
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    • pp.37-44
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    • 2010
  • New features of motion compensation, such as variable block size and multiple reference frames are introduced in H.264/AVC. However, these new features induce significant implementation complexity increases. In this paper, an efficient architecture for spiral-type motion estimation is proposed. First, we propose a hardware-friendly spiral search order. Then, an efficient processing element (PE) architecture for ME is proposed to achieve the proposed search order. The improved PE enables one-pixel-move of the reference pixel data to top, bottom, right, and left by four ports for input and output. Moreover, the parallel calculation architecture to calculate all block size with the SAD of 4x4 is introduced in the proposed architecture. As the result of hardware implementation, the hardware cost is about 145k gates. Maximum clock frequency is 134 MHz in the case of FPGA (Xilinx Vertex5) implementation.