• 대한산업공학회지
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• 제33권1호
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• pp.110-125
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• 2007

Various different types of yard cranes are used in container terminals. Examples are rubber tired gantry cranes,rail mounted gantry cranes, overhead bridge cranes, dual rail-mounted gantry cranes, and automated stacking cranes. The kinematics and handling characteristics of these yard cranes are different from each other. Ttiis study analyses charactehstics of generic types of yard cranes which represent various yard cranes m practice Demg used in several types of block layouts, Considering specifications of yard cranes and block layouts, expected cycle times and variances of the cycle time are estimated for different handling activities.

• 산업경영시스템학회지
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• 제17권30호
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• pp.1-9
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• 1994

In this study the recent papers and articles related to facility layout are reviewed to identify the factors to be considered on the development of block layouts. The factors found on the articles are used in the questionnaire to find out the desired closeness ratings for them in machinery plants. The weights found at the survey are used on the development of layouts using CORELAP with examples as a demonstration purpose.

• 마이크로전자및패키징학회지
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• 제20권4호
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• pp.75-79
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• 2013

A power distribution network (PDN) is a network that provides connection between the voltage source supply and the power/ground terminals of a microprocessor chip. It consists of a voltage regulator module, a printed circuit board, a package substrate, a microprocessor chip as well as decoupling capacitors. For power integrity analysis, the board and package layouts have to be transformed into an electrical network of resistor, inductor and capacitor components which may be expressed using the S-parameters models. This modeling process generally takes from several hours up to a few days for a complete board or package layout. When the board and package layouts change, they need to be re-extracted and the S-parameters models also need to be re-generated for power integrity assessment. This not only consumes a lot of resources such as time and manpower, the task of PDN modeling is also tedious and mundane. In this paper, a block-based PDN modeling is proposed. Here, the board or package layout is partitioned into sub-blocks and each of them is modeled independently. In the event of a change in power rails routing, only the affected sub-blocks will be reextracted and re-modeled. Simulation results show that the proposed block-based PDN modeling not only can save at least 75% of processing time but it can, at the same time, keep the modeling accuracy on par with the traditional PDN modeling methodology.

• 대한산업공학회지
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• 제27권1호
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• pp.54-60
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• 2001

In this paper, a shape-based block layout (SBL) approach is presented to solve the facility layout problem with unequal-area and fixed shapes. The SBL approach employs hybrid genetic algorithm (Hybrid-GA) to find a good solution and the concept of bay structure is used. In the typical facility layout problem with unequal area and fixed shapes, the given geometric constraints of unequal-area and fixed shapes are mostly approximated to original shape by aspect ratio. Thus, the layout results require extensive manual revision to create practical layouts and it produces irregular building shapes and too much unusable spaces. Experimental results show that a SBL model is able to produce better solution and to create more practical layouts than those of existing approaches.

• 산업공학
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• 제19권2호
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• pp.160-167
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• 2006

It is a crucial managerial issue how to manage assembly blocks at shipyard. Based on the project experience in Hyundai Heavy Industries, this study points out the difficulties on the block stockyard operations, formalizes the JIBUN (location) assignment problem for assembly blocks, and develops the JIBUN (location) assignment algorithm whose purpose is to reduce the number of unproductive block moves. Through simulation experiments for various situations, this study demonstrates the usefulness of JIBUN (location) assignment algorithm. In addition, this study examines the impacts of block move sequence rules and of block stockyard layouts on the block stockyard operations.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 하계종합학술대회 논문집(2)
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• pp.246-249
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• 2000

In this paper, we describe an automated extraction program that transforms a mask layout into an approximated equivalent circuit information suitable for circuit simulation, and that extract the geometric parameters of stacked MOSFETs and the distributed RCs of layout blocks. To extract equivalent circuit from mask layout, we propose new block disassembly technique capable of accurate computations of distributed RCs at branch point, using vectorized edges which represent the outline of an individual polygon.

• 산업공학
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• 제22권2호
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• pp.116-125
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• 2009

We revisit the assembly block storage location assignment problem (ABSLAP) at a shipyard, in order to compensate for the deficiency in performance verification of the heuristic ABSLAP algorithm developed by the previous study. In this paper, we formulate a mathematical programming model of the ABSLAP, refine elaborately the heuristic ABSLAP algorithm, and show the performance of the developed mathematical programming model and the revised heuristic ABSLAP algorithm. In addition, we explain simulation experiments conducted using the revised heuristic ABSLAP algorithm to investigate the influences of block stockyard layouts and production schedule instability on the block stockyard operations.

• 대한전자공학회논문지SD
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• 제38권12호
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• pp.75-84
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• 2001

오늘날 집적회로의 집적도가 증가되고 있기 때문에 회로 소자는 기생성분의 영향을 최소화하고 회로의 성능을 감소시키는 요인을 최소화하도록 설계되어야 한다. 그래서 칩을 제작하기 전에 레이아웃으로부터 추출한 회로가 정확한가를 검증하고 시뮬레이션으로 추출된 회로가 설계사양을 만족하는지를 확인해야 한다. 본 논문에서는 스택 구조의 MOSFET의 기하학적인 파라미터와 레이아웃 배선 블록의 분산 RC를 추출할 수 있는 새로운 블록 분할 기법을 제안한다. 폴디드 캐스코드 CMOS 연산 증폭기의 레이아웃에 이 기법을 작용하여 회로를 추출하고, Hspice로 시뮬레이션을 수행하여 전기적 연결관계와 이들 소자의 영향을 검증하였다.

• 한국경영과학회:학술대회논문집
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• 한국경영과학회 1989년도 추계학술발표회 발표논문초록집; 이화여자대학교, 서울; 23 Sep. 1989
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• pp.77-85
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• 1989

The purpose of this research entails the study of the multicriteria graph-theoretic Facility Layout Problem(FLP), the development of a Decision Support System(DSS), and a sensitivity analysis for graph Theoretic heuristics. The graph theoretic FLP Decision Support System gives decision makers or planners more information as a guide in producing their final layouts. This information is provided by a variety of final result scores, so called upper bound values, based on different options and different criteria. The increased information provided will give decision makers more confidence in design a block plan. One case is presented to demonstrate the applicability of the system to real-world problem. Finally, applicabilities of the DSS to other format layouts, such as GT layout and JIT's U-line, are briefly mentioned.

• 응용통계연구
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• 제4권1호
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• pp.25-32
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• 1991

본 논문에서는 이원배치모형에서 처리효과의 순서대립가설을 검정하기 위한 점근분포무관 검정법을 제안하고 제안한 통계량의 점근정규성과 일반화된 Puri의 통계량과의 점근상대효율을 살펴보았다. 또한 소표본에서 Monte Carlo연구를 통하여 제안된 통계량을 기존의 다른 방법들과 비교 연구하였다.