• Title/Summary/Keyword: Bit-Parallel

Search Result 406, Processing Time 0.027 seconds

A Study on the Synchronization Techniques for 5GHz High-speed WLANs (5GHz대역 고속 무선 LAN 시스템을 위한 동기화 기법 연구)

  • 김인겸
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.28 no.6C
    • /
    • pp.594-601
    • /
    • 2003
  • High-speed WLAN(Wireless Local Area Network) systems operating in 5GHz band use OFDM transmission technique. OFDM technique transmits data in parallel and has many advantage compared with the serial transmission system-for example, robustness to time variance of channel. OFDM technique use the orthogonal multicarriers. The ICI(InterChannel Interference) caused by the orthogonality destruction between subcarriers. hamper the BER performance. In this paper, we propose the synchronization techniques for high-speed WLAN system designed to support user data rates up to 54Mbps at 5GHz. The proposed synchronization techniques are the reduced complexity structure having the similar performance compared with the conventional synchronization techniques.

An Improvement on Multicode CDMA Systems Using a Convolutional Code and a Bi-Orthogonal Code (길쌈 부호와 이원 직교 부호에 의한 다중부호 부호분할 다원접속 시스템의 개선)

  • 김기범;신요안
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.23 no.7
    • /
    • pp.1659-1666
    • /
    • 1998
  • The multicode CDMA systems that are widely studied as an effective transmission methodology in the IMT-2000 systems, employ orthogonal codes to transform high rate data into parallel, low rate data for simultaneous transmission. In this paper, we propose a new multicode CDMA system which achieves the same data rate and processing gain of the conventional systems, while significantly improves bit error rate performance by exploiting a convolutional code with code rate r=1/2 and a bi-orthogonal code. The simulation results for synchronous systems using maximal ratio combining Rake receivers under additive white Gaussian noise and multi-path fading channels, show significant improviements by the proposed system.

  • PDF

An Algorithm for Computing the Weight Enumerating Function of Concatenated Convolutional Codes (연쇄 컨볼루션 부호의 가중치 열거함수 계산 알고리듬)

  • 강성진;권성락;이영조;강창언
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.24 no.7A
    • /
    • pp.1080-1089
    • /
    • 1999
  • The union upper bounds to the bit error probability of maximum likelihood(ML) soft-decoding of parallel concatenated convolutional codes(PCCC) and serially concatenated convolutional codes(SCCC) can be evaluated through the weight enumerating function(WEF). This union upper bounds become the lower bounds of the BER achievable when iterative decoding is used. In this paper, to compute the WEF, an efficient error event search algorithm which is a combination of stack algorithm and bidirectional search algorithm is proposed. By computor simulation, it is shown that the union boounds obtained by using the proposed algorithm become the lower bounds to BER of concatenated convolutional codes with iterative decoding.

  • PDF

Combined Horizontal-Vertical Serial BP Decoding of GLDPC Codes with Binary Cyclic Codes (이진 순환 부호를 쓰는 GLDPC 부호의 수평-수직 결합 직렬 복호)

  • Chung, Kyuhyuk
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.39A no.10
    • /
    • pp.585-592
    • /
    • 2014
  • It is well known that serial belief propagation (BP) decoding for low-density parity-check (LDPC) codes achieves faster convergence without any increase of decoding complexity per iteration and bit error rate (BER) performance loss than standard parallel BP (PBP) decoding. Serial BP (SBP) decoding, such as horizontal SBP (H-SBP) decoding or vertical SBP (V-SBP) decoding, updates check nodes or variable nodes faster than standard PBP decoding within a single iteration. In this paper, we propose combined horizontal-vertical SBP (CHV-SBP) decoding. By the same reasoning, CHV-SBP decoding updates check nodes or variable nodes faster than SBP decoding within a serialized step in an iteration. CHV-SBP decoding achieves faster convergence than H-SBP or V-SBP decoding. We compare these decoding schemes in details. We also show in simulations that the convergence rate, in iterations, for CHV-SBP decoding is about $\frac{1}{6}$ of that for standard PBP decoding, while the convergence rate for SBP decoding is about $\frac{1}{2}$ of that for standard PBP decoding. In simulations, we use recently proposed generalized LDPC (GLDPC) codes with binary cyclic codes (BCC).

A Study on Evaluation of MTCM with Optimum Encoder (최적부호기의 MTCM 성능 이득에 관한 연구)

  • 김민호;박재운;변건식
    • Journal of the Korea Society of Computer and Information
    • /
    • v.4 no.4
    • /
    • pp.185-192
    • /
    • 1999
  • In this paper. for $\pi$/4 and $\pi$/8 PSK. we proposed to condition to obtain coding gain increasing states, by design encoder of analytical method with minimal complexity in limited bandwidth and power channels. In order to improve the bit error rate(BER), comparing Ungerboeck designed the TCM. we propose MTCM(Multiple trellis-coded modulation) with multiplicity(k=2), by optimum encoder design. By design encoder of analytical method. the trellis encoder can be minimal complexity and the decoder be used Viterbi decoder(MLSE). When compared to the TCM and MTCM with AWGN channels. the condition of performance enhancement of the MTCM with multiplicity(k=2) is the case of parallel transition in TCM systems. without alternating data transmission rate in bandwidth and power limited channels.

  • PDF

Ternary Content Addressable Memory with Hamming Distance Search Functions

  • Uchiyama, Hiroki;Tanaka, Hiroaki;Fukuhara, Masaaki;Yoshida, Masahiro;Suzuki, Yasoji
    • Proceedings of the IEEK Conference
    • /
    • 2002.07c
    • /
    • pp.1535-1538
    • /
    • 2002
  • The flexibility of content addressable mem-ory (CAM) can greatly be extended through the use of trits (ternary digits) Trits consist of binary logical values “0” and “1” with addition of “x” (“dont’t care”). The “dont’t care“is extremely useful for providing com- pact representation of sets of bit strings. In this paper, we propose a new ternary CAM with Hamming distance search functions. Each memory cell in the CAM consists of a pair of lambda diodes which can store trits, namely, a logical “0”, “1” and “x” (“dont’t care“). The CAM can compare stored data and an input data in parallel, and find stored data with Hamming distance within a certain range (“near match“). Also, the interrogation characteristics of the ternary CAM are analyzed in detail. Furthermore, the results obtained these analyses are fully confirmed by simulation using the circuit analysis program HSPICE.

  • PDF

Improved Physical Layer Implementation of VANETs

  • Khan, Latif Ullah;Khattak, M. Irfan;Khan, Naeem;Khan, Atif Sardar;Shafi, M.
    • IEIE Transactions on Smart Processing and Computing
    • /
    • v.3 no.3
    • /
    • pp.142-152
    • /
    • 2014
  • Vehicular Ad-hoc Networks (VANETs) are comprised of wireless mobile nodes characterized by a randomly changing topology, high mobility, availability of geographic position, and fewer power constraints. Orthogonal Frequency Division Multiplexing (OFDM) is a promising candidate for the physical layer of VANET because of the inherent characteristics of the spectral efficiency and robustness to channel impairments. The susceptibility of OFDM to Inter-Carrier Interference (ICI) is a challenging issue. The high mobility of nodes in VANET causes higher Doppler shifts, which results in ICI in the OFDM system. In this paper, a frequency domain com-btype channel estimation was used to cancel out ICI. The channel frequency response at the pilot tones was estimated using a Least Square (LS) estimator. An efficient interpolation technique is required to estimate the channel at the data tones with low interpolation error. This paper proposes a robust interpolation technique to estimate the channel frequency response at the data subcarriers. The channel induced noise tended to degrade the Bit Error Rate (BER) performance of the system. Parallel concatenated Convolutional codes were used for error correction. At the decoding end, different decoding algorithms were considered for the component decoders of the iterative Turbo decoder. A performance and complexity comparison among the various decoding algorithms was also carried out.

Construction of Orthogonal Basis Functions with Non-Divergent Barotropic Rossby-Haurwitz Waves

  • Cheong, Hyeong-Bin;Jeong, Hanbyeol;Kim, Wonho
    • Journal of the Korean earth science society
    • /
    • v.35 no.5
    • /
    • pp.333-341
    • /
    • 2014
  • A new set of basis functions was constructed using the Rossby-Haurwitz waves, which are the eigenfunctions of nondivergent barotropic vorticity equations on the sphere. The basis functions were designed to be non-separable, that is, not factored into functions of either the longitude or the latitude. Due to this property, the nodal lines of the functions are aligned neither along with the meridian nor the parallel. The basis functions can be categorized into groups of which members have the same degree or the total wavenumber-like index on the sphere. The orthonormality of the basis functions were found to be close to the machine roundoffs, giving the error of $O(10^{-15})$ or $O(10^{-16})$ for double-precision computation (64 bit arithmetic). It was demonstrated through time-stepping procedure that the basis functions were also the eigenfunctions of the non-divergent barotropic vorticity equations. The projection of the basis functions was carried out onto the low-resolution geopotential field of Gaussian bell, and compared with the theory. The same projections were performed for the observed atmospheric-geopotential height field of 500 hPa surface to demonstrate decomposition into the fields that contain disturbance of certain range of horizontal scales. The usefulness of the new basis functions was thus addressed for application to the eigenmode analysis of the atmospheric motions on the global domain.

Structure of Low-Power MOS Current-Mode Logic Circuit with Sleep-Transistor (슬립 트랜지스터를 이용한 저 전력 MOS 전류모드 논리회로 구조)

  • Kim, Jeong-Beom
    • The KIPS Transactions:PartA
    • /
    • v.15A no.2
    • /
    • pp.69-74
    • /
    • 2008
  • This paper proposes a structure of low-power MOS current-mode logic circuit with sleep-transistor to reduce the leakage current. The sleep-transistor is used to high-threshold voltage transistor to minimize the leakage current. The $16\;{\times}\;16$ bit parallel multiplier is designed by the proposed circuit structure. Comparing with the conventional MOS current-model logic circuit, the circuit achieves the reduction of the power consumption in sleep mode by 1/50. This circuit is designed with Samsung $0.35\;{\mu}m$ CMOS process. The validity and effectiveness are verified through the HSPICE simulation.

Design of High Speed LDPC Encoder Based on DVB-S2 Standard (DVB-S2 기반 고속 LDPC 부호기 설계)

  • Park, Gun Yeol;Lee, Seong Ro;Jeon, Sung Min;Jung, Ji-Won
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.38C no.2
    • /
    • pp.196-201
    • /
    • 2013
  • In this paper, we proposed high speed LDPC encoder architecture for DVB-S2 standard. In conventional algorithm, the processes of parity calculations are serial fashion. Therefore conventional algorithm need clocks of number of parity. The proposed LDPC encoding architecture is based on a parallel 360 bits-wise operations. The key issues for realizing high speed are using the two kinds of index addresses and make use of memories efficiently. We implemented a half rate LDPC encoder on an FPGA, and confirmed its maximum throughput is up to 10 Gbps on 100MHz clock.