• Title/Summary/Keyword: Bit errors

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Impact of Channel Estimation Errors on BER Performance of Single-User Decoding NOMA System

  • Chung, Kyuhyuk
    • International Journal of Internet, Broadcasting and Communication
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    • v.12 no.4
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    • pp.18-25
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    • 2020
  • In the fifth generation (5G) and beyond 5G (B5G) mobile communication, non-orthogonal multiple access (NOMA) has attracted great attention due to higher spectral efficiency and massive connectivity. We investigate the impacts of the channel estimation errors on the bit-error rate (BER) of NOMA, especially with the single-user decoding (SUD) receiver, which does not perform successive interference cancellation (SIC), in contrast to the conventional SIC NOMA scheme. First, an analytical expression of the BER for SUD NOMA with channel estimation errors is derived. Then, it is demonstrated that the BER performance degrades severely up to the power allocation less than about 20%. Additionally, we show that for the fixed power allocation of 10% in such power allocation range, the signal-to-noise (SNR) loss owing to channel estimation errors is about 5 dB. As a consequence, the channel estimation error should be considered for the design of the SUD NOMA scheme.

Linear Prediction of Multispectral Images Per Pel Using Classification (영역분류를 이용한 다분광 영상 데이터의 화소 단위 선형 예측 기법)

  • 조윤상;구한승;나성웅
    • Proceedings of the IEEK Conference
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    • 2000.11d
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    • pp.163-166
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    • 2000
  • In this paper, we will present a lossy data compression method for coding multispectral images. The proposed method uses both spatial and spectra] correlation inherent in multispectral images. First, band 2 and band 6 are vector quantized. Secondly, band 4 is estimated with the quantized band 2 using the predictive coding. Errors of band 4 are encoded at a second stage based on the magnitude of the errors. Thirdly, remaining bands are calculated with the quantized band 2 and band 4. Errors of residual bands are wavelet transformed and then we apply the SPIHT coding on the transformed coefficients. We classify classes without extra information transmitting and then use linear predictor. And errors can be encoded by SPIHT coding at any target rate we are want. It is shown that this method has better performance than FPVQ. Average PSNR rises 0.645 dB at the same bit rate.

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An Implementation of a 4-Bit Diode Phase Shifter in the Parallel Plate Waveguide for the RADANT Lens (RADANT 렌즈를 위한 평행판 도파관 내에서의 4-비트 다이오드 위상변위기 구현)

  • Lee, Kee-Oh;Park, Dong-Chul
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.20 no.9
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    • pp.906-913
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    • 2009
  • In this paper, the design concept and implementation method of the X-band 4-bit($22.5^{\circ}$, $45^{\circ}$, $90^{\circ}$, $180^{\circ}$ BIT) diode phase shifter in the parallel plate waveguide are introduced. The simulated results of $11.25^{\circ}$, $22.5^{\circ}$ and $45^{\circ}$ dielectric phase shift layers using CST's MWS and Agilent's ADS are presented, and the measured results are compared with the simulated ones. The simulated phase shift errors at the center frequency are $0.6^{\circ}$, $0.7^{\circ}$, and $3.5^{\circ}$, respectively and the measured phase shift errors at the center frequency are $0.6^{\circ}$, $2^{\circ}$, and $5.5^{\circ}$, respectively. Also, the MWS simulated results of $22.5^{\circ}$ BIT and $45^{\circ}$ BIT phase shifter are presented and compared with the ADS simulated ones to verify the validity of the presented design concept and implementation method.

A Study on the Test Strategy of Digital Circuit Board in the Production Line Based on Parallel Signature Analysis Technique (PSA 기법에 근거한 생산라인상의 디지털 회로 보오드 검사전략에 대한 연구)

  • Ko Yun-Seok
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.53 no.11
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    • pp.768-775
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    • 2004
  • The SSA technique in the digital circuit test is required to be repeated the input pattern stream to n bits output nodes n times in case of using a multiplexor. Because the method adopting a parallel/serial bit convertor to remove this inefficiency has disadvantage of requiring the test time n times for a pattern, the test strategy is required, which can enhance the test productivity by reducing the test time based on simplified fault detection mechanism. Accordingly, this paper proposes a test strategy which enhances the test productivity and efficiency by appling PAS (Parallel Signature Analysis) technique to those after analyzing the structure and characteristics of the digital devices including TTL and CMOS family ICs as well as ROM and RAM. The PSA technique identifies the faults by comparing the reminder from good device with reminder from the tested device. At this time, the reminder is obtained by enforcing the data stream obtained from output pins of the tested device on the LFSR(Linear Feedback Shift Resister) representing the characteristic equation. Also, the method to obtain the optimal signature analyzer is explained by furnishing the short bit input streams to the long bit input streams to the LFSR having 8, 12, 16, 20bit input/output pins and by analyzing the occurring probability of error which is impossible to detect. Finally, the effectiveness of the proposed test strategy is verified by simulating the stuck at 1 errors or stuck at 0 errors for several devices on typical 8051 digital board.

Fault Tolerant Cryptography Circuit for Data Transmission Errors (데이터 전송 오류에 대한 고장 극복 암호회로)

  • You, Young-Gap;Park, Rae-Hyeon;Ahn, Young-Il;Kim, Han-Byeo-Ri
    • The Journal of the Korea Contents Association
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    • v.8 no.10
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    • pp.37-44
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    • 2008
  • This paper presented a solution to encryption and decryption problem suffering data transmission error for encrypted message transmission. Block cypher algorithms experience avalanche effect that a single bit error in an encrypted message brings substantial error bits after decryption. The proposed fault tolerant scheme addresses this error avalanche effect exploiting a multi-dimensional data array shuffling process and an error correction code. The shuffling process is to simplify the error correction. The shuffling disperses error bits to many data arrays so that each n-bit data block may comprises only one error bit. Thereby, the error correction scheme can easily restore the one bit error in an n-bit data block. This scheme can be extended on larger data blocks.

Optimizing the Circuit for Finding 2 Error Positions of 2 Error Correcting Reed Solomon Decoder (리드솔로몬 복호기에서 2개의 오류시, 오류위치를 찾는 최적화 방법)

  • An, Hyeong-Keon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.36 no.1C
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    • pp.8-13
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    • 2011
  • In this paper, we show new method to find error locations of 2 eight bit symbol errors for 2 error correcting Reed-Solomon decoder. New design is much faster and has much simpler logic circuit than the former design method. This optimization was possible by partitioning the 8 bit operations into 4 bit arithgmatic and logic operations. This Reed Solomon decoder can be used for data protection of almost all digital communication and consumer electronic devices.

Joint Quality Control of VBR MPEG Video Programs (VBR MPEG 비디오 프로그램들의 결합 화질 제어)

  • 홍성훈;김성대
    • Proceedings of the IEEK Conference
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    • 1999.06a
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    • pp.591-596
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    • 1999
  • In this paper, we present a joint quality control system to be able to accurately control the relative picture quality among the video programs in terms of PSNR. The joint quality control system allows variable bit rate (VBR) for each video program to maintain the pre-determined relative picture quality among the aggregated video programs while keeping a constant sum of the bit rates for all programs to be transmitted over a single constant bit rate (CBR) channel. This is achieved by simultaneous controlling the video encoders to generate VBR video streams at the central controller. Furthermore we also suggest buffer regulation method based on the analysis of the constraints imposed by sender/receiver buffer sizes and total transmission rate. Through various simulation results, it is found that our quality control systems guarantee that the video buffers do not overflow and underflow and the quality control errors do not exceed 0.1 ㏈.

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Channel Coder Implementation and Performance Analysis for Speech Coding: Considering bit Importance of Speech Information-part III (음성 부호기용 채널 부호화기의 구현 및 성능 분석)

  • 강법주;김선영;김상천;김영식
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.27 no.4
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    • pp.484-490
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    • 1990
  • In speech coding scheme, because information bits have different error sensitivities over channel errors, the channel coder for combining with speech coding should be realized by the variable coding rate considering the bit importance of speech information bits. In realizing the 4 kbps channel coder for 12kbps speech, this paper have chosen the channel coding method by analyzing the hard-decision post-decoding error rate of RCPC(Rate Compatible Punctured Convolutional) codes and bit error sensitivity of 12 kbps speech. Under the coherent QPSK and Rayleigh fading channel, the performance analysis has showed that 10dB gain was obtained in speech SEGSNR by 4-level uneuqal error protection, which was compared with the caseof no channel coding at 7dB channel SNR.

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An Algorithm for Bit Error Rate Monitoring and Adaptive Decision Threshold Optimization Based on Pseudo-error Counting Scheme

  • Kim, Sung-Man
    • Journal of the Optical Society of Korea
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    • v.14 no.1
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    • pp.22-27
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    • 2010
  • Bit error rate (BER) monitoring is the ultimate goal of performance monitoring in all digital transmission systems as well as optical fiber transmission systems. To achieve this goal, optimization of the decision threshold must also be considered because BER is dependent on the level of decision threshold. In this paper, we analyze a pseudo-error counting scheme and propose an algorithm to achieve both BER monitoring and adaptive decision threshold optimization in optical fiber transmission systems. To verify the effectiveness of the proposed algorithm, we conduct computer simulations in both Gaussian and non-Gaussian distribution cases. According to the simulation results, BER and the optimum decision threshold can be estimated with the errors of < 20% and < 10 mV, respectively, within 0.1-s processing time in > 40-Gb/s transmission systems.