• 한국음향학회지
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• 제25권3호
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• pp.113-120
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• 2006

본 논문은 slow 페이딩 채널에서 block type 파일럿 배치에 기반한 OFDM (Orthogonal Frequency Division Multiplexing) 시스템의 등화 기법을 다루고 있다. 수중 채널에서 얻을 수 있는 비트 속도는 셀룰러 폰이나 실내 무선 시스템과 같은 여타 통신 채널에 비해 상대적으로 낮은 편이며, 따라서 채널 추적시 도플러 효과가 중요한 파라미터가 된다. Coherent 복조 방식의 경우 도플러 주파수에 의한 잔여 평균위상에러는 시스템 성능에 치명적으로 작용할 수 있으며, 등화기만으로는 평균 도플러 쉬프트 효과에 대처하지 못할 수 있다. 공통 도플러 효과에 대처하기 위해 주파수 등화기와 더불어 위상에러 추적회로를 사용하여 회전 에러를 배제할 수 있다. 아울러 성능 저하를 최소화하는 수준에서 추적회로의 연산 부담을 줄일 수 있음을 시뮬레이션을 통해 증명하였다.

• 한국전자파학회논문지
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• 제22권6호
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• pp.613-624
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• 2011

본 논문에서는 X-대역 능동 위상 배열 레이더 시스템용 MMIC 다기능 칩을 0.5 ${\mu}m$ p-HEMT 상용 공정을 이용하여 개발하였다. 설계된 다기능 칩에는 제어 신호 선로수를 최소화하기 위해 디지털 직병렬 변환기를 포함하고 있다. 다기능 칩은 6-비트 디지털 위상 천이 기능, 6-비트 디지털 감쇠 기능, 송/수신 모드 선택 기능, 신호 증폭 기능 등의 다양한 기능을 제공한다. 24 $mm^2$(6 mm${\times}$4 mm) 칩 크기의 비교적 소형으로 제작된 MMIC 다기능 칩은 8.5~10.5 GHz에서 24/15 dB의 송/수신 이득 특성과 21 dBm의 P1dB 특성을 보였다. 그리고 6-비트, 64 상태에 대해 위상 천이 특성과 감쇠 특성의 측정 결과, 동작 주파수에서 $7^{\circ}$의 RMS 위상 오차와 0.3 dB의 RMS 감쇠 오차를 보였다.

• 한국군사과학기술학회지
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• 제17권6호
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• pp.821-827
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• 2014

This paper considers a distributed telemetry system using retransmission algorithm with one master telemetry and two slave telemetries. The master telemetry merges data from each slave telemetry and own measured data. If there exist some errors in data from the slave telemetry, the master telemetry requests retransmission to corresponding slave telemetry. In this paper, we propose a retransmission algorithm applied to implementing the distributed telemetry system. Simulation results demonstrate that the retransmission improves the performance of the communication between the master and slave telemetries.

• JSTS:Journal of Semiconductor Technology and Science
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• 제12권3호
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• pp.331-340
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• 2012

In the deep sub-micron ICs, growing amounts of on-die memory and scaling effects make embedded memories increasingly vulnerable to reliability and yield problems. Spare columns are often included in memories to repair defective cells or bit lines during production test. In many cases, the repair process will not use all spare columns. Schemes have been proposed to exploit these unused spare columns to store additional check bits which can be used to reduce the miscorrection probability for triple errors in single error correction-double error detection (SEC-DED). These additional check bits increase the dimensions of the parity check matrix (H-matrix) requiring extra area overhead. A method is proposed in this paper to efficiently fill the extra rows of the H-matrix on the basis of similarity of logic between the other rows. Optimization of the whole H-matrix is accomplished through logic sharing within a feasible operating time resulting in reduced area overhead. A detailed implementation using fuse technology is also proposed in this paper.

• 대한토목학회논문집
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• 제12권1호
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• pp.43-50
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• 1992

본(本) 연구의 목적(目的)은 평면응력/변형과 축대칭 및 쉘문제를 포함하는 다양한 응용문제에서 계층적(階層的) 성질을 갖는 적분형 르장드르 형상함수에 의한 P-version 모델의 통용성(通用性)을 확인하는 것이다. 현대 유한요소 해석에서 정확도를 확보하지 못하는 가장 큰 이유는 비(非)압축성 재료와 망목(網目)설계시 요소의 형상비(形狀比), 사다리꼴 요소에서 변(邊)의 감소비(減少比)와 평행사변형 요소의 왜곡도(歪曲度) 등을 갖는 불규칙 형상에서 나타나는 가상메카니즘과 Locking 현상이다. 조건수(條件數)와 에너지 노름이 계산오차, 수렴성 및 알고리즘의 효율성을 검증하는데 사용되었으며 해석결과는 NASTRAN과 SAP90 및 Cheung이 제안한 Hybrid 요소와 비교되었다. NASTRAN을 제외한 SAP90 및 P-version 프로그램은 16 Bit 소형컴퓨터에 의해 실행되었다.

• 한국멀티미디어학회논문지
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• 제20권6호
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• pp.853-864
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• 2017

HD padding area is essential redundancy in HD broadcasting. It is possible to use this padding area for the purpose of improving DTV broadcasting services. For utilization of this area, The bit of a service data was converted to black and white $8{\times}8$ block image. Converted block images are compressed with active video and are delivered to a receiver as only DC coefficients in a video stream. video quality is not effected by the proposed method, and service data was perfectly recovered in receiver without errors by using block average and threshold. The proposed utilization of HD essential padding area can possibly overcome the limited transmission stream rate with the bandwidth of HD broadcasting. If service data in transport or video stram were transferred using this padding area, it is possible to improve video quality with expanded video stream rate. Additionally, because the proposed methods are based on well-established standards, it is also useful for world-wide HD broadcasting systems such as ATSC, DVB, and IPTV.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2005년도 ICCAS
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• pp.1260-1263
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• 2005

Data storage related with writing and retrieving requires high storage capacity, fast transfer rate and less access time. Today any data storage system cannot satisfy these conditions, however holographic data storage system can perform faster data transfer rate because it is a page oriented memory system using volume hologram in writing and retrieving data. System can be constructed without mechanical actuating part therefore fast data transfer rate and high storage capacity about 1Tb/cm3 can be realized. In this research, to reduce errors of binary data stored in holographic data storage system, a new method for bit error reduction is suggested. First, find fuzzy rule using experimental system for Element of Holographic Digital Data System. Second, make fuzzy rule table using Genetic algorithm. Third, reduce prior error element and recording Digital Data. Recording ratio and reconstruction ratio will be very good performance

• 대한임베디드공학회논문지
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• 제1권1호
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• pp.24-30
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• 2006

With the original Transmission Control Protocol(TCP) design, which is particularly targeted at the wired networks, a packet loss is assumed to be caused by the network congestion. In the wireless environment where the chances to lose packets due to transmission bit errors are not negligible, though, this assumption may result in unnecessary TCP performance degradation. In these days, many papers describe about wireless-TCP which has suggested how to avoid congestion control when packet loss over the wireless network. In this paper, an enhancement scheme is proposed by modifying SNOOP scheme. To enhance the original SNOOP scheme, CPC(Consecutive Packet Control) and ZWSC(Zero Window Size Control) are added. The invocation of congestion control mechanism is now minimized by knowing the cause of packet loss. We use simulation to compare the overhead and the performance of the proposed schemes, and to show that the proposed schemes improve the TCP performance compares to SNOOP by knowing the cause of packet loss at the base station.

• 한국통신학회논문지
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• 제31권7C호
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• pp.700-705
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• 2006

In this paper, an informed watermarking algorithm is proposed that aids in concealing packet loss errors in video communications. This watermark-based error concealment (WEC) method embeds a low resolution version of the video frame inside itself as watermark data. At the receiver, the extracted watermark is used as a reference for error concealment. The proposed DCT-based algorithm employs informed watermarking techniques in order to minimize the distortion of host frames. At the encoder, a predictive feedback loop is employed which helps to adjust the strength of the data embedding. Furthermore, the distortion of the DCT coefficients introduced in the embedding can be removed to a considerable extent, by employing bit-sign adaptivity. Simulation results on standard video sequences show that the proposed informed WEC scheme has an advantage of 3$\sim$4 dB in PSNR over non-informed WEC and that even a non-informed WEC is still superior to conventional error concealment techniques.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 하계학술대회 논문집 Vol.5 No.2
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• pp.1222-1225
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• 2004

This paper presents multibit Sigma-Delta ADC using noise-shaped dynamic element matching(DEM). 5-bit flash ADC for multibit quantization in Sigma Delta modulator offers the following advantages such as lower quantization noise, more accurate white-noise level and more stability over single quantization. For the feedback paths consisting of DAC, the DAC element should have a high matching requirement in order to maintain the linearity performance which can be obtained by the modulator with a multibit quantizer. The DEM algorithm is implemented in such a way as to minimize additional delay within the feedback loop of the modulator Using this algorithm, distortion spectra from DAC linearity errors are shaped. Sigma Delta ADC achieves 82dB signal to noise ratio over 615H7z bandwidth, and 62mW power dissipation at a sampling frequency of 19.6MHz. This Sigma Delta ADC is designed to use 0.25um CMOS technology with 2.5V supply voltage and verified by HSPICE simulation.