• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.11
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• pp.1019-1022
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• 2003

We studied the nematic liquid crystal (NLC) aligning capabilities using the new alignment material of a-C:H thin film as working gas at 30W rf bias condition. A high pretilt angle of about 5$^{\circ}$ by ion beam(IB) exposure on the a-C:H thin film surface was measured. A good LC alignment by the IB alignment method on the a-C:H thin film surface was observed at annealing temperature of 250$^{\circ}C$, and the alignment defect of the NLC was observed above annealing temperature of 300$^{\circ}C$. Consequently, the high LC pretilt angle and the good thermal stability of LC alignment by the IB alignment method on the a-C:H thin film surface as working gas at 30W rf bias condition can be achieved.

• Journal of the Korea Institute of Military Science and Technology
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• v.12 no.2
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• pp.222-227
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• 2009

The bias characteristics due to the changes of temperature and temperature gradient of fiber coil are investigated in fiber-optic gyroscope. The bias performance is degraded with the changes of temperature and temperature gradient of fiber coil. The temperature compensation using both the temperature-dependent bias measurement and the temperature-induced error model of fiber-optic gyroscope improves the bias stability about 3 times as much as the uncompensated original case, which leads to very stable bias performance over the temperature range from $-35^{\circ}C$ to $+77^{\circ}C$.

• Journal of Advanced Marine Engineering and Technology
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• v.32 no.8
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• pp.1263-1268
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• 2008

In this paper, the low noise power amplifier for GaAs FET ATF-10136 is designed and fabricated with active bias circuit and self bias circuit. To supply most suitable voltage and current, active bias circuit is designed. Active biasing offers the advantage that variations in the pinch-off voltage($V_p$) and saturated drain current($I_{DSS}$) will not necessitate a change in either the source or drain resistor value for a given bias condition. The active bias network automatically sets a gate-source voltage($V_{gs}$) for the desired drain voltage and drain current. Using resistive decoupling circuits, a signal at low frequency is dissipated by a resistor. This design method increases the stability of the LNA, suitable for input stage matching and gate source bias. The LNA is fabricated on FR-4 substrate with active and self bias circuit, and integrated in aluminum housing. As a results, the characteristics of the active and self bias circuit LNA implemented more than 13 dB and 14 dB in gain, lower than 1 dB and 1.1 dB in noise figure, 1.7 and 1.8 input VSWR at normalized frequency $1.4{\sim}1.6$, respectively.

• Korean Journal of Clinical Laboratory Science
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• v.45 no.1
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• pp.5-8
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• 2013

In the specimen of free PSA in the low concentration, the result in % bias from our institution and comparable evaluation institution was -33.7% which is exceeded % bias ${\pm}20%$ ; however, it was the domestically allowable limit recommended by the laboratory accreditation commission for specimen at the low concentration. In this paper, the cause was accredited by instability of free PSA substance within the specimen, and the specimen stability test was performed according to CLSI documents GP29-A2. After the low and high concentration specimen were made, and rapidly cooled down in a deep freezer with $-30^{\circ}C$, serum of two concentrations was measured for 10 consecutive days with 3 times a day by Architect i2000 and observed a change in the mean value. As the results of two groups, there were changes in the established target value, and a change level was evaluated by calculating it with % bias. The low concentration specimen had no significant reduction until the 4 day lapse in cold storage. However, % bias were reduced by -17.5% from the 5 day lapse, by 21.5% after the 7 day lapse, and by -26.9% after the 9 day lapse. The frozen specimen had only intra-day variation for 10 days. In the high concentration specimen, bias began to show as -12.2% from the 3 day lapse in cold storage. There was reduction by -28.9% from the 5 day lapse, by -39% after the 7 day lapse, and by -42.9% after the 9 day lapse. In the frozen specimen, there was only intra-day variation like the low concentration specimen in cold storage.

• Journal of Electrical Engineering and Technology
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• v.7 no.4
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• pp.626-635
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• 2012

Most of single frequency GPS receivers utilize low-quality crystal oscillators. If a lowquality crystal oscillator is utilized as the time reference of a GPS receiver, the receiver's clock bias grows very fast due to its inherent low precision and poor stability. To prevent the clock bias becoming too large, large clock jumps are intentionally injected to the clock bias and the time offset for clock steering purpose. The abrupt changes in the clock bias and the time offset, if not properly considered, induce serious accuracy degradation in relative differential positioning. To prevent the accuracy degradation, this paper proposes an efficient and systematic method to eliminate the undesirable clock jump effects. Experiment results based on real measurements verify the effectiveness of the propose method.

• ETRI Journal
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• v.34 no.6
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• pp.966-969
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• 2012

From a practical viewpoint, the topic of electrical stability in oxide thin-film transistors (TFTs) has attracted strong interest from researchers. Positive bias stress and constant current stress tests on indium-gallium-zinc-oxide (IGZO)-TFTs have revealed that an IGZO-TFT with a larger Ga portion has stronger stability, which is closely related with the strong binding of O atoms, as determined from an X-ray photoelectron spectroscopy analysis.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.391-391
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• 2010

The stability enhancement of Znic oxide thin film transistor deposited by PLD-DBD has been reported here using the bias temperature stress test. Znic oxide (ZnO) thin films were deposited on $SiO_2$/Si (100) by pulsed laser deposition method with and without dielectric barrier discharge (DBD) method. The DBD is the efficient method to adopt the nitrogen ions into the thin films. The TFT characteristics of ZnO TFTs with and without Nirogen (N) doping show similar results with $I_{on/off}$ of $10^5{\sim}10^6$. However. the bias temperature stress (BTS) test of N-doped ZnO TFT with DBD shows higher stability than that of ZnO TFT.

• Journal of the Microelectronics and Packaging Society
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• v.12 no.2 s.35
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• pp.105-109
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• 2005

A compact antenna switch module for GSM/DCS dual band applications based on multilayer low temperature co-fired ceramic (LTCC) substrate is presented. Its size is $4.5{\times}3.2{\times}0.8 mm^3$ and insertion loss is lower than 1.0 dB at Rx mode and 1.2 dB at Tx mode. To verify the stability of the developed module to the process window, each block that is diplexer, LPF's and bias circuit is measured by probing method in the variation with the thickness of ceramic layer and the correlation between each block is quantified by calculating the VSWR In the mean while, two types of bias circuits -lumped and distributed - are compared. The measurement of each block and the calculation of VSWR give good information on the behavior of full module. The reaction of diplexer to the thickness is similar to those of LPF's and bias circuit, which means good relative matching and low value of VSWR, so total insertion loss is maintained in quite wide range of the thickness of ceramic layer at both band. And lumped type bias circuit has smaller insertion itself and better correspondence with other circuit than distributed stripline structure. Evaluated ceramic module adopting lumped type bias circuit has low insertion loss and wider stability region of thickness over than 6um and this can be suitable for the mass production. Stability characterization by probing method can be applied widely to the development of ceramic modules with embedded passives in them.

• Transactions on Electrical and Electronic Materials
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• v.12 no.5
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• pp.197-199
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• 2011

In this paper, the bottom-gate thin-film transistors (TFTs) were fabricated with an amorphous/microcrystalline Si double layer (DL) as an active layer and the variations of the electrical characteristics were investigated according to the DC bias stresses. Since the fabrication process of DL TFTs was identical to that of the conventional amorphous Si (a-Si) TFTs, it creates no additional manufacturing cost. Moreover, the amorphous/microcrystalline Si DL could possibly improve stability and mass production efficiency. Although the field effect mobility of the typical DL TFTs is similar to that of a-Si TFTs, the DL TFTs had a higher reliability with respect to the direct current (DC) bias stresses.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.1243-1246
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• 2009

A novel a-Si TFT integrated gate driver circuit which suppresses the threshold voltage shift due to prolonged positive gate bias to pull-down TFTs, is reported. Negative gate-to-drain bias is applied alternately to the pull-down TFTs to recover the threshold voltage shift. Consequently, the stability of the circuit has been improved considerably.