• Title/Summary/Keyword: Berlekamp-Massey algorithm

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On algorithm for finding primitive polynomials over GF(q) (GF(q)상의 원시다항식 생성에 관한 연구)

  • 최희봉;원동호
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.11 no.1
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    • pp.35-42
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    • 2001
  • The primitive polynomial on GF(q) is used in the area of the scrambler, the error correcting code and decode, the random generator and the cipher, etc. The algorithm that generates efficiently the primitive polynomial on GF(q) was proposed by A.D. Porto. The algorithm is a method that generates the sequence of the primitive polynomial by repeating to find another primitive polynomial with a known primitive polynomial. In this paper, we propose the algorithm that is improved in the A.D. Porto algorithm. The running rime of the A.D. Porto a1gorithm is O($\textrm{km}^2$), the running time of the improved algorithm is 0(m(m+k)). Here, k is gcd(k, $q^m$-1). When we find the primitive polynomial with m odor, it is efficient that we use the improved algorithm in the condition k, m>>1.

New Low-Power and Small-Area Reed-Solomon Decoder (새로운 저전력 및 저면적 리드-솔로몬 복호기)

  • Baek, Jae-Hyun;SunWoo, Myung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.6
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    • pp.96-103
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    • 2008
  • This paper proposes a new low-power and small-area Reed-Solomon decoder. The proposed Reed-Solomon decoder using a novel simplified form of the modified Euclid's algorithm can support low-hardware complexity and low-Power consumption for Reed-Solomon decoding. The simplified modified Euclid's algorithm uses new initial conditions and polynomial computations to reduce hardware complexity, and thus, the implemented architecture consisting of 3r basic cells has the lowest hardware complexity compared with existing modified Euclid's and Berlekamp-Massey architectures. The Reed-Solomon decoder has been synthesized using the $0.18{\mu}m$ Samsung standard cell library and operates at 370MHz and its data rate supports up to 2.9Gbps. For the (255, 239, 8) RS code, the gate counts of the simplified modified Euclid's architecture and the whole decoder excluding FIFO memory are only 20,166 and 40,136, respectively. Therefore, the proposed decoder can reduce the total gate count at least 5% compared with the conventional DCME decoder.