• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.421-425
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• 1999

As the market size of multiprocessor systems for commercial applications, parallel systems, especially cache-coherent shared-memory multiprocessors that are conventionally designed for scientific applications need to be tuned in different fashion to achieve the best performance for new application area. In this paper, indepth investigation on the memory behavior which is the primary cause for performance changes were made. We chose representative benchmarks in scientific and commercial application areas. After running execution-driven simulation for bus-based cache-coherent shared-memory multiprocessors, we experienced significant differences and conclude that the systems must be carefully and differently designed to achieve the best performance when they are built for distinct applications.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.7
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• pp.117-124
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• 1994

In this pape, we propose a graph-theoretic approach for solving the allocation problem for the synthesis of datapaths based on multiport memories. An efficient algorithm is devised by using the weighted bipartite matching algorithm to assign variables to each port of memory modules. The proposed algorithm assigns program variables into a minimum number of multiport memory modules such that usage of memory elements and interconnection cost can be kept minimal. Experimental results show that the proposed algorithm generates the datapaths with fewer registers in memory modules and less interconnection cost for several benchmarks available from the literatures.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.408-411
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• 1999

Microarchitecture simulator is an important tool to verify and optimize the microarchitecture of a new microprocessor. Moreover. it can be use as a performance simulator to estimate the target microprocessor′s performance. And system software designers can use it as a software developing environment. This paper describes a "microarchitecture simulator for on-chip Multiprocessor microprocessor". It is a program-driven and cycle-based simulator that can execute simultaneous mutithreading benchmarks. We verified the microarchitecture of a new on-chip multiprocessor microprocessor with it and did performance simulations to estimate the performance of the on-chip multiprocessor microprocessor.

• Journal of the East Asian Society of Dietary Life
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• v.17 no.5
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• pp.727-737
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• 2007

The aims of this study was to suggest a new efficiency measurement indicator for evaluating the management efficiency of decision making units(DMUs) in the contract foodservice industry. The data envelopment analysis(DEA) model which considers multiple inputs and outputs and looking for benchmarks, was used to compare the productivity of DMUs. We considered sales, profits, and customer satisfaction as output variables and it adopted food cost, labor cost and administrative expense as input variables. The results of applying DEA revealed relatively efficient types of business and service types. The efficiency of school units was highest and the mired service type was the most efficient one. In this study the CCR model efficiency was analysed with profit and the customer satisfaction index by the matrix method. DEA efficiency was correlated with profit but there was no correlation between DEA efficiency and the customer satisfaction index.

• IEMEK Journal of Embedded Systems and Applications
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• v.11 no.2
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• pp.57-65
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• 2016

In this paper, we propose a system for efficient use of shared memory between CPU and GPU. The system, called Fusion Architecture, assures consistency of the shared memory and minimizes cache misses that frequently occurs on Heterogeneous System Architecture or Unified Virtual Memory based systems. It also maximizes the performance for memory intensive jobs by efficient allocation of GPU cores. To test between architectures on various scenarios, we introduce the Fusion Architecture Analyzer, which compares OpenMP, OpenCL, CUDA, and the proposed architecture in terms of memory overhead and process time. As a result, Proposed fusion architectures show that the Fusion Architecture runs benchmarks 55% faster and reduces memory overheads by 220% in average.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.63 no.12
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• pp.1704-1709
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• 2014

In order to increase the performance of multi-core system processor architectures, the multi-thread branch predictor which speculatively fetches and allocates threads to each core should be highly accurate. In this paper, the perceptron based multi-thread branch predictor is proposed for the multi-core processor architectures. Using SPEC 2000 benchmarks as input, the trace-driven simulation has been performed for the 2 to 16-core architectures employing perceptron multi-thread branch predictor extensively. Its performance is compared with the architecture which utilizes the two-level adaptive multi-thread branch predictor.

• Steel and Composite Structures
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• v.28 no.3
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• pp.389-401
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• 2018

An isoparametric six-node triangular element is utilized for geometrically nonlinear analysis of functionally graded (FG) shells. To overcome the shear and membrane locking, the element is improved by using strain interpolation functions. The Total Lagrangian formulation is employed to include the large displacements and rotations. Finding the nonlinear behavior of FG shells via laminated modeling is also the goal. A power function is employed to formulate the variation of elastic modulus through the thickness of shells. The results are presented in two ways, including the general FGM formulation and the laminated modeling. The equilibrium path is obtained by using the Generalized Displacement Control Method. Some popular benchmarks, including hyperbolical shell structures are solved to declare the correctness and accuracy of proposed formulations.

• Korean Management Science Review
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• v.22 no.2
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• pp.77-97
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• 2005

The traditional measures of a container port (or terminal) efficiency such as crane productivity, cargo throughput, etc. were generally presenting the partial efficiency since they evaluated only each individual factor and based on cross-sectional data. To overcome this problem, and in an effort to help port authorities develop a winning strategy in the increasingly competitive container transportation market, this Paper develops a meaningful set of benchmarks that will set the standard for best practices. In particular, this paper proposed a combined method to merge the DEA and simulation technique over time. To illustrate the usefulness of the proposed combined DEA/simulation model, this paper used the panel data of the four Gwangyang container terminals and seven Busan container terminals in Korea over the four-year period of 1999 through 2002.

• 한국전산유체공학회:학술대회논문집
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• 2006.05a
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• pp.163-166
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• 2006

We have introduced a new version of the 3-D lid-driven cavity problem that leads to more complicated fluid parcel trajectories and thus, enhanced mixing, but at the same time weakens corner singularities. We employed an advanced form of LES to solve this problem and presented preliminary results that show very complicated streamline structures on both large and small scales, despite a relatively low Reynolds number. Finally, we demonstrated moderate speedups via parallelization. Ongoing tests are expected to resolve the questions raised regarding possible sources of the rather poor parallel performance compared with that seen in earlier studies with the same code. Because it is expected that findings may be significant for parallel performance in general, we plan to emphasize this aspect in the oral presentation the Parrel (CFD 2006 Conference.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.10a
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• pp.403-404
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• 2012

This paper proposes development of a game application playing on smartphones. Game applications occupy an important classification among many applications on mobile platform. The proposed game application is developed on the iPhone and benchmarks Fortress based on PC platforms.