• Analytical Science and Technology
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• v.11 no.5
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• pp.347-352
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• 1998

A study was carried out on the elelctrochemical characteristics of chemically modified electrodes (CMEs) by cyclic voltammetry. Fabrication of CMEs was made by coating with mixed valence (mv) inorganic-metal polymeric films on the glassy carbon electrode surface by potential cycling. Anodic oxidation behavior of methanol and L-ascorbic acid was studied by using CMEs working electrode. Deposition of films such as mv ruthenium oxo/ruthenium cyanide film (mv Ru-O/CN-Ru), mv ruthenium oxo/ferrocyanide film (mv Ru-O/$Fe(CN)_6$), and mv ruthenium oxo/ruthenium cyanide/Rhodium film (mv Ru-O/CN-Ru/Rh) was obtained to coat by scan rate of 50 mV/sec within the specified potential range (-0.5V ~ +1.2V). Film thickness was controlled by the repeat of the potential cycling. Anodic oxidation behavior of methanol was as follow. Calibration graph by using mv Ru-O/CN-Ru film showed linearly from 10 mM to 80 mM MeOH with slope factor of $-7.552{\mu}A/cm^2$. Although slope factor by using mv Ru-O/$Fe(CN)_6$ film was $-5.13{\mu}A/cm^2$, yet linear range of calibration graph could be extended from 10 mM to 100 mM MeOH. Anodic oxidation behavior of L-ascorbic acid was studied by mv Ru-O/CN-Ru film on the glassy carbon electrode and the glassy carbon electrode with Rh film, Glassy carbon electrode modified with Ru polymeric film was showed better sensitivity than the Rh-glassy carbon modified electrode (mv Ru-O/CN-Ru/Rh). Calibration graph was linear from 0.1 mM to 5 mM L-ascorbic acid by using glassy carbon electrode modified with Ru polymeric film. Solpe factor and relative coefficient are $-84.78{\mu}A/mM$ and 0.998, respectively.

• Proceedings of the Korean Fiber Society Conference
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• 2003.10a
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• pp.51-52
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• 2003

In order to understand the buffering behavior of hygroscopic fabric under subzero conditions, microclimates of the wool and PET clothing system were measured and compared. Vertical type Man-Clothing-Environment simulator was used to measure the microclimate at the environmental temperature of -10$^{\circ}C$. Buffering capacity was quantified by calculating from the depth and width of the hyperbolic curve of the graph. Hydrophilic wool fabrics showed better buffering capacity at the transient state than hydrophobic PET fabrics; which is attributed to the heat of sorption.

• Proceedings of the Korea Society for Industrial Systems Conference
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• 1998.10a
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• pp.655-662
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• 1998

This paper is on the anlaysis for real-time software requirement . This method can be used for TNPIN(Timed Numerical Petri Net) as a easy communication means with a real-users. It is based on the RTTL(Real Time Temporal Logic) for correctness fo the system. TNPN is used to represent a behavior specification language, the validity of specified behaviors in TNPN is expressed in RTTL , and analyzed through the reachability graph. Thus , the requirement of between user and system is satisfied. By the example of shared track, the validity of the property of real-time (safetiness, responsiveness, liveness, priority) is verified. Also, this framework is give to connection with a object natually.

• Korean Journal of Mathematics
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• v.18 no.3
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• pp.323-334
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• 2010

We give a theorem for the existence of at least three solutions for the fourth order elliptic boundary value problem with the square growth variable coefficient nonlinear term. We use the variational reduction method and the critical point theory for the associated functional on the finite dimensional subspace to prove our main result. We investigate the shape of the graph of the associated functional on the finite dimensional subspace, (P.S.) condition and the behavior of the associated functional in the neighborhood of the origin on the finite dimensional reduction subspace.

• Journal of Korea Multimedia Society
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• v.4 no.4
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• pp.356-362
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• 2001

In this paper, we show the behaviors of all states in C and the states in C', where C' is a complemented cellular automata whose the complemented vector is a nonzero state in the 0-tree of a linear TPMACA C. Also we show that if we know a path in the state-transition graph of C, then we can know the behavior of all states in C.

• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.815-818
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• 1998

Hardware formal verification involves the use of analytical techniques to prove that the implementation of a system confroms to the specification. The specification could be a set of properties that the system must have or it could be an alternative representation of the system behavior. We can represent our behavioral specification to be written in VHDL coding. In this paper, we proposed a new hardware design verification method. For theis method, we assumed that a verification pattern already exists and try to make an algorithm to find a place where a design error occurred. This method uses an hierarchical approach by making control flow graph(CFG) hierarchically. From the simulation, this method was turned out to be very effective that all the assumed design errors could be detected.

• Journal of the Korea Society for Simulation
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• v.21 no.2
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• pp.103-112
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• 2012

Traditional system-oriented measures are no longer adequate to describe the availability perceived by the user. In this paper we investigate the service availability model and the user behavior graph. And we propose the simulation model, which determines the sevice availability considering user model, system model and service model at the same time. Through the example, we show how to construct the UBG of user model, system model and service model. And we investigate the effect of the parameters of system model and UBG on the service availability.

• Computers and Concrete
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• v.12 no.4
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• pp.431-442
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• 2013

This study attempted to find a proper method applicable to simulating practical equifield lines of two-dimensional Accelerate Lithium Migration Technique (ALMT), and evaluate the feasibility of using the theoretical ion migration model of one-dimensional ALMT to predict the ion migration behavior of two-dimensional ALMT. The result showed that the electrolyte or carbon plate can be used as matrix to draw equifield line graph similar to that by using mortar as matrix. Using electrolyte electrode module for simulation has advantages of simple production, easy measurement, rapidness, and economy. The electrolyte module can be used to simulate the equifield line distribution diagram in practical two-dimensional electrode configuration firstly. Then, several equifield line zones were marked, and several subzones under one-dimensional ALMT were separated from various equifield line zones. The theoretical free content distribution of alkali in concrete under two-dimensional electric field effect could be obtained from duration analysis.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 1995.04b
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• pp.457-462
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• 1995

This paper describes diagnosis strategy of the Flexible Multiple Fault Diagnosis Module for forecasting faults in system and deciding current machine state form sensor information. Most studydeal with diagnosis control stategy about single fault in a system, this studies deal with multiple fault diagnosis. This strategy is consist of diagnosis control module such as backward tracking expert system shell, various neural network, numerical model to predict machine state and communication module for information exchange and cooperate between each model. This models are used to describe structure, function and behavior of subsystem, complex component and total system. Hierarchical structure is very efficient to represent structural, functional and behavioral knowledge. FT(Fault Tree). ST(Symptom Tree), FCD(Fault Consequence Diagrapy), SGM(State Graph Model) and FFM(Functional Flow Model) are used to represent hierachical structure. In this study, IA(Intelligent Agent) concept is introduced to match FT component and event symbol in diagnosed system and to transfer message between each event process. Proposed diagnosis control module is made of IPC(Inter Process Communication) method under UNIX operating system.

• Proceedings of the IEEK Conference
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• 2000.07a
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• pp.359-362
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• 2000

In this paper, we propose a test pattern generation algorithm on the basis of the identification of undetectable faults for Speed-Independent(SI) asynchronous control circuits. The proposed methodology generates tests from the specification of a target circuit, which describes the behavior of the circuit in the form of Signal Transition Graph (STG). The proposed identification method uses only topological information of a target circuit and reachability information of a fault-free circuit, which is generated in the form of Binary Decision Diagram(BDD) during pre-processing. Experimental results show that high fault coverage over single input stuck-at fault model is obtained for several synthesized SI circuits and the use of the identification process as a preprocessing decreases execution time of the proposed test generation with negligible costs.