• Title/Summary/Keyword: Balanced-Modulation Code

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Error-Correcting 7/9 Modulation Codes For Holographic Data Storage

  • Lee, Kyoungoh;Kim, Byungsun;Lee, Jaejin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.39A no.2
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    • pp.86-91
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    • 2014
  • Holographic data storage (HDS) has a number of advantages, including a high transmission rate through the use of a charge coupled device array for reading two-dimensional (2D) pixel image data, and a high density capacity. HDS also has disadvantages, including 2d intersymbol interference by neighboring pixels and interpage interference by multiple pages stored in the same holographic volume. These problems can be eliminated by modulation codes. We propose a 7/9 error-correcting modulation code that exploits a Viterbi-trellis algorithm and has a code rate larger (about 0.778) than that of the conventional 6/8 balanced modulation code. We show improved performance of the bit error rate with the proposed scheme compared to that of the simple 7/9 code without the trellis scheme and the 6/8 balanced modulation code.

Two-Dimensional 8/9 Error Correcting Modulation Code

  • Lee, Kyoungoh;Kim, Byungsun;Lee, Jaejin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.39A no.5
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    • pp.215-219
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    • 2014
  • In holographic data storage (HDS), a high transmission rate is accomplished through the use of a charge coupled device array for reading two-dimensional (2D) pixel image data. Although HDS has many advantages in terms of storage capacity and data transmission rates, it also features problems, such as 2D intersymbol interference (ISI) by neighboring pixels and interpage interference (IPI) by multiple images stored in the same holographic volume. Modulation codes can be used to remove these problems. We introduce a 2D 8/9 error-correcting modulation code. The proposed modulation code exploits the trellis-coded modulation scheme, and the code rate is larger (about 0.889) than that of the conventional 6/8 balanced modulation code (an increase of approximately 13.9%). The performance of the bit error rate (BER) with the proposed scheme was improved compared with that of the 6/8 balanced modulation code and the simple 8/9 code without the trellis scheme.

A Sparse-ON Pixel Two-Dimensional 4-Level 4/6 Balanced-Modulation Code in Holographic Data Storage Systems (홀로그래픽 데이터 저장장치를 위한 저밀도 ON 픽셀 2차원 4-레벨 4/6 균형 변조부호)

  • Park, Keunhwan;Lee, Jaejin
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.11
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    • pp.9-14
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    • 2016
  • In the holographic data storage system, the data can be stored more than one bit per pixel and the storage capacity and transmission rate can be increased. In this paper, we proposed a sparse-ON pixel 4/6 balanced-modulation code that the code rate is 1.33 (bit/pixel) with uniform page density. Even though the performance of the proposed sparse-ON pixel 4/6 balanced-code is similar to 2/3 and 6/9 modulation codes, it can increase the storage capacity more than these modulation codes and also store more pages in a volume by reducing the rate of ON pixels to mitigate IPI (inter-page interference).

A Two-Dimensional Pseudo-balanced Code for Holographic Data Storage Systems (홀로그래픽 데이터 저장 시스템을 위한 2차원 코드)

  • Kim, Na-Young;Lee, Jae-Jin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.11C
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    • pp.1037-1043
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    • 2006
  • In this paper, we introduce a two-dimensional modulation code for holographic data storage systems(HDSS), which is a candidate for the next generation data storage system. The two-dimensional(2D) intersymbol interference(ISI) induces higher bit error rate(BER). The balanced number of zeros(dark) and ones(light) in each page reduces inter-page interference(IPI). The code rate is 519. Although the proposed code has higher code rate than other 2D code with rate 4/9, the BER performances of two codes are similar.

Trellis Encoding of 6/8 Balanced Code for Holographic Data Storage Systems (홀로그래픽 저장장치를 위한 2차원 6/8 균형부호의 트렐리스 인코딩)

  • Kim, Byungsun;Lee, Jaejin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.39A no.10
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    • pp.569-573
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    • 2014
  • Holographic data storage is a strong contender to become the next-generation data storage method. Its major weaknesses are two-dimensional intersymbol interference between neighboring pixels and interpage interference caused by storing multiple pages in a single volume of hologram. In this paper, we present a trellis encoding scheme of 6/8 balanced modulation code, to address the two weaknesses. The proposed modulation coding scheme captures on characteristics of the balanced code: the scheme relaxes IPI and enables error correction by exploiting the trellis structure. The proposed method showed improved SNR over the conventional 6/8 modulation code.

A Sparse-ON Pixel Two-Dimensional 6/8 Modulation Code (저밀도 ON 픽셀 2차원 6/8 변조부호)

  • Hwang, Myungha;Lee, Jaejin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.38A no.10
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    • pp.833-837
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    • 2013
  • Since holographic data storages read and write information on a volume and the information is processed per page, it has the advantage of high recording density and data transfer rate. However, there are two major drawbacks like 2-dimensional intersymbol interference and interpage interference as the density between pixels increases. Furthermore, a bright page that contains many ON pixels influences the reliable detection of the neighboring pages, which causes the less number of pages stored in the storage volume. We propose a sparse-ON pixel two-dimensional modulation code with the code rate 6/8 for increasing the number of pages stored in the volume. The proposed code is compared to conventional 6/8 balanced code, and it shows similar or a little bit better performance than that of the balanced code. Therefore, the proposed code can increase the recording capacity without loss of the performance.

Implementation of SSB/BPSK-DS/CDMA Baseband Modem (SSB/BPSK-DS/CDMA Baseband 모뎀 설계 및 구현)

  • 노시창;임명섭
    • Proceedings of the IEEK Conference
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    • 2001.06a
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    • pp.5-8
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    • 2001
  • SSB(Single Sideband) modulation scheme is high bandwidth efficient method in the mobile communication system compared with present DSB(Double Sideband) modulation scheme. Using the othogonality between inphase PN code and Hilbert transformed quadrature PN code, we propose phase estimation structure that enables coherent demodulation in the reverse link basestation receiver Several system characteristics, bit error rate and phase error variance, are simulated and compared with balanced QPSK DS/CDMA system. To verify system performance, SSB/BPSK-DS/CDMA test board is implemented using FPGA chips.

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4-Level Balanced Modulation Code for the Mitigation of Two-Dimensional Intersymbol Interference in Holographic Data-Storage Systems (홀로그래픽 데이터 저장장치에서 2차원 심볼 간 간섭을 완화하기 위한 4-레벨 균형 변조부호)

  • Park, Keunhwan;Lee, Jaejin
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.9
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    • pp.12-17
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    • 2016
  • In the holographic data storage system (HDSS), the data regarding the volume of a storage medium are recorded and read by the page, and the transmission rate and storage capacity can be increased because of two-dimensional, page-oriented data processing; furthermore, the multi-level HDSS can store more than one bit per pixel. For this same reason, however, and unlike conventional data-storage systems, the HDSS is hampered by two-dimensional (2D) intersymbol interference (ISI) and interpage interference (IPI). Progress regarding the published papers on 2D ISI, which is more severe in the multi-level HDSS, continues; however, mitigation of both 2D ISI and IPI in terms of the multi-level HDSS has not yet been studied. In this paper, we therefore propose a 4-level balanced-modulation code that simultaneously mitigates 2D ISI and IPI.

Learning Source Code Context with Feature-Wise Linear Modulation to Support Online Judge System (온라인 저지 시스템 지원을 위한 Feature-Wise Linear Modulation 기반 소스코드 문맥 학습 모델 설계)

  • Hyun, Kyeong-Seok;Choi, Woosung;Chung, Jaehwa
    • KIPS Transactions on Software and Data Engineering
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    • v.11 no.11
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    • pp.473-478
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    • 2022
  • Evaluation learning based on code testing is becoming a popular solution in programming education via Online judge(OJ). In the recent past, many papers have been published on how to detect plagiarism through source code similarity analysis to support OJ. However, deep learning-based research to support automated tutoring is insufficient. In this paper, we propose Input & Output side FiLM models to predict whether the input code will pass or fail. By applying Feature-wise Linear Modulation(FiLM) technique to GRU, our model can learn combined information of Java byte codes and problem information that it tries to solve. On experimental design, a balanced sampling technique was applied to evenly distribute the data due to the occurrence of asymmetry in data collected by OJ. Among the proposed models, the Input Side FiLM model showed the highest performance of 73.63%. Based on result, it has been shown that students can check whether their codes will pass or fail before receiving the OJ evaluation which could provide basic feedback for improvements.

Error Control Scheme for High-Speed DVD Systems

  • Lee, Joon-Yun;Lee, Jae-Jin;Park, Tae-Geun
    • 정보저장시스템학회:학술대회논문집
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    • 2005.10a
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    • pp.103-110
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    • 2005
  • We present a powerful error control decoder which can be used in all of the commercial DVD systems. The decoder exploits the error information from the modulation decoder in order to increase the error correcting capability. We can identify that the modulation decoder in DVD system can detect errors more than $60\%$ of total errors when burst errors are occurred. In results, fur a decoded block, error correcting capability of the proposed scheme is improved up to $25\%$ more than that of the original error control decoder. In addition, the more the burst error length is increased, the better the decoder performance. Also, a pipeline-balanced RSPC decoder with a low hardware complexity is designed to maximize the throughput. The maximum throughput of the RSPC decoder is 740Mbps@100MHz and the number of gate counts is 20.3K for RS (182, 172, 11) decoder and 30.7K for RS (208, 192, 17) decoder, respectively

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