• Journal of the Korean Ceramic Society
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• v.27 no.4
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• pp.447-456
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• 1990

ZnWO4 single crystals were grown by Czochralski method. And the orientation of grown crystals were determined by Laue back reflection, and the crystals were siliced at (100), (010), (001) face before polishing. The morphologys and distribution of etch pits on each face were observed by optical microscopy. In the present study, we understood that dislocation distributjioon rely on shape of solid-liquid interface, and secondary phase acts on the dislocation source. We also observed dislocation trace(etch pits) of (100) slip plane on (010) cleavage plane.

• Journal of the Korean Recycled Construction Resources Institute
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• v.5 no.4
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• pp.435-441
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• 2017

Studies on self-healing have currently been diversified and the methods to evaluate the studies have become more diversified as well. Among them, the back-scattered electron (BSE) image acquired through the scanning electron microscope (SEM) is attempted as the means to evaluate the self-healing effect on cracks. In order evaluate by the BSE image, sophisticated pre-processing of specimen is critical and this injected inside the particle, pore and artificial crack of the hardener to stabilize the structure of the newly generated self-healing product and it enables to endure the stress on polishing without deformation. The impregnated specimen smoothen the surface to obtain the BSE image of high resolution that polishing is made for diamond suspension for wet polishing after dry polishing. As a result of evaluating the self-healing product on the impregnated and polished self-healing specimen, the generated product is formed from the surface of the artificial crack and the self-healing substances are confirmed as $Ca(OH)_2$ and C-S-H.

• Proceedings of the KSME Conference
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• 2003.04a
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• pp.980-986
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• 2003

As the ultra precision grinding can be applied to wafering process by the refinement of the abrasive, the development of high stiffness equipment and grinding skill, the conventional wafering process which consists of lapping, etching, Ist, 2nd and 3rd polishing could be exchanged to the new process which consists of precision surface grinding, final polishing and post cleaning. Especially, the ultra precision grinding of wafer improves the flatness of wafer and the efficiency of production. Futhermore, it has been not only used in bare wafer grinding, but also applied to wafer back grinding and SOI wafer grinding. This paper focused on the effect of the wheel path density and relative velocity on the characteristic of ground wafer in in-feed grinding with cup-wheel. It seems that the variation of the parameters in radial direction of wafer results in the non-uniform surface quality over the wafer. So, in this paper, the geometric analysis on grinding process is carried out, and then, the effect of the parameters on wafer surface quality is evaluated

• Journal of the Korean Society for Precision Engineering
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• v.21 no.10
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• pp.26-33
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• 2004

Ultra precision grinding technology has been developed from the refinement of the abrasive, the development of high stiffness equipment and grinding skill. The conventional wafering process which consists of lapping, etching, 1 st, 2nd and 3rd polishing has been changed to the new process which consists of precision surface grinding, final polishing and post cleaning. Especially, the ultra precision grinding of wafer improves the flatness of wafer and the efficiency of production. Furthermore, it has been not only used in bare wafer grinding, but also applied to wafer back grinding and SOI wafer grinding. This paper focuses on the flatness of the ground wafer. Generally, the ground wafer has concave pronto because of the difference of wheel path density, grinding temperature and elastic deformation of the equipment. Wafer tilting is applied to avoid non-uniform material removal. Through the geometric analysis of wafer grinding process, the profile of the ground wafer is predicted by the development of profile simulator.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2003.06a
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• pp.98-101
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• 2003

As the ultra precision grinding can be applied to wafering process by the refinement of the abrasive. the development of high stiffness equipment and grinding skill, the conventional wafering process which consists of lapping, etching, 1st, 2nd and 3rd polishing could be exchanged to the new process which consists of precision surface grinding, final polishing and post cleaning. Especially, the ultra precision grinding of wafer improves the flatness of wafer and the efficiency of production. Futhermore, it has been not only used in bare wafer grinding, but also applied to wafer back grinding and SOI wafer grinding. This paper focused on the flatness of the ground wafer. Generally, the ground wafer has concave profile because of the difference of wheel path density, grinding temperature and elastic deformation of the equiptment. Tilting mathod is applied to avoid such non-uniform material removes. So, in this paper, the geometric analysis on grinding process is carried out, and then, we can predict the profile of th ground wafer by using profile simulation.

• Journal of the Korean Society for Precision Engineering
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• v.18 no.12
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• pp.192-199
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• 2001

Chemical mechanical planarization (CMP) has emerged as the planarization technique of choice in both front-end and back-end integrated circuit manufacturing. Conventional CMP process utilize a polyurethane polishing pad and liquid chemical slurry containing abrasive particles. There hale been serious problems in CMP in terms of repeatability and deflects in patterned wafers. Especial1y, dishing and erosion defects increase the resistance because they decrease the interconnection section area, and ultimately reduce the lifetime of the semiconductor. Methods to reduce dishing & erosion have recently been interface hardness of the pad, optimization of the pattern structure as dummy patterns. Dishing & erosion are initially generated an uneven pressure distribution in the materials. These defects are accelerated by free abrasives and chemical etching. Therefore, it is known that dishing & erosion can be reduced by minimizing the abrasive concentration. Minimizing the abrasive concentration by using CeO$_2$is the best solution for reducing dishing & erosion and for removal rate. This paper introduce dishing & erosion generating mechanism and a method fur developing a semi-rigid abrasive pad to minimize dishing & erosion during CMP.

• Transactions on Electrical and Electronic Materials
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• v.12 no.3
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• pp.115-118
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• 2011

Process characterization of the chemical mechanical polishing (CMP) process for undensified phosphosilicate glass (PSG) film is reported using design of experiments (DOE). DOE has been addressed to experimenters to understand the relationship between input variables and responses of interest in a simple and efficient way. It is typically beneficial for determining the adequate size of experiments with multiple process variables and making statistical inferences for the responses of interests. Equipment controllable parameters to operate the machine include the down force (DF) of the wafer carrier, pressure on the backside of the wafer, table and spindle speed (SS), slurry flow rate, and pad condition. None of them is independent; thus, the interaction between parameters also needs to be indicated to improve process characterization in CMP. In this paper, we have selected the five controllable equipment parameters, such as DF, back pressure (BP), table speed (TS), SS, and slurry flow (SF), most process engineers recommend to characterize the CMP process with respect to material removal rate (RR) and film uniformity as a percentage. The polished material is undensified PSG. PSG is widely used for the plananization in multi-layered metal interconnects. We identify the main effect of DF, BP, and TS on both RR and film uniformity, as expected, by the statistical modeling and analysis on the metrology data acquired from a series of $2^{5-1}$ fractional factorial design with two center points. This revealed the film uniformity of the polished PSG film contains two and three-way interactions. Therefore, one can easily infer that the process control based on better understanding of the process is the key to success in semiconductor manufacturing, typically when the wafer size reaches 300 mm and is continuously scheduled to expand up to 450 mm in or little after 2012.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.482-483
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• 2009

In chemical mechanical planarization (CMP) process, the uniformity of stress acting on wafer surface is a key factor for uniform material removal of thin film especially in the oxide CMP. In this paper, we analyze the stress on the contact region between wafer and pad with finite-element analysis (FEA). The setting pressure acting on wafer back side was $500g/cm^2$ and the retainer pressure was changed from 300 to $700g/cm^2$. The polishing test is also done with the same conditions. The material removal rate profiles well-matched with stress distribution.

• Proceedings of the KIEE Conference
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• 2001.07c
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• pp.1349-1351
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• 2001

Polycrystalline diamond films are deposited by using a microwave plama CVC system, where the bias-enhanced nucleation (BEN) method is employed. Effects of the varying microwave power, the surface treatment by hydrogen plasma, and the cyclic hydrogen etching during deposition on the crystallinity as well as on the surface roughness of deposited films are examined by Raman spectroscopy, SEM, and AFM. A novel method for achieving a smoother diamond surface is also suggested through the indirect wafer bonding and back-side polishing.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.93-94
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• 2005

Cu metallization using electrochemical plating(ECP) has played an important role in back end of line(BEOL) interconnect formation. In this work, we studied the optimized copper thickness using Bottom-up Gap-fill in Cu ECP, which is closely related with the pattern dependencies in Cu ECP and Cu dual damascene process at 0.13 ${\mu}m$ technology node. In order to select an optimized Cu ECP thickness, we examined Cu ECP bulge, Cu CMP dishing and electrical properties of via hole and line trench over dual damascene patterned wafers split into different ECP Cu thickness.