• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.12 no.4
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• pp.630-643
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• 2001

In this paper, the performance of a Multi-Carrier DS-CDMA system with Hybrid $SC/MRC- L_{c}/L$ diversity in the multipath Rayleigh fading environment is analyzed and compared with that of a Wideband DS-CDMA system. Each carriers of the number of the input diversity branches in the Multi-Carrier DS-CDMA system is L and among L, the branches of $L_c$ are chosen to be maximum-ratio-combined. And the diversity outputs are coherent-detected and despread by the correlator of each carrier. As the result, we have known that the structure of the Wideband DS-CDMA system with Hybrid $SC/MRC-L_{c}/L$ diversity reception becomes simple due to no synchronization of bit or phase and in terms of the error performance, the performance of Hybrid $SC/MRC- L_{c}/L$ diversity is better than that of selection diversity, but worse than that of MRC diversity. Moreover, the performance of a Multi-Carrier DS-CDMA system is better than that of a Wideband DS-CDMA system in multipath Rayleigh fading channel since Hybrid $SC/MRC- L_c/L$ diversity can obtain gain from each diversity branch. In case four carriers are used and required BER is $10^{-6}$ in wireless data communication, Hybrid SC/MRC-2/4 diversity can increase more 17 users than Hybrid SC/MRC-2/3 diversity because the better input branches can be selected through increase of input branches.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.4
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• pp.984-995
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• 1996

Data errors according to the various noises caused in the satellite communication links are corrected by the Viterbi decoding algorithm which has extreme error correcting capability. In this paper, we designed and implemented a convolutional encoder and Viterbi decoder ASIC which is used to encode the input data at the transmit side and correct the errors of the received data at the receive side for use in the VSAT communication system. And this chip may be used in any BPSK, QPSK, or OQPSK transmission system. The ambiguity resolver corrects PSK modem ambiguities by delaying, interting, and/or exchanging code symbol to restore their original sequence and polarity. In case of previous decoding system, ambiguity state(AS) of data is resolved by external control logic and extra redundancy data are needed to resolve AS. But, by adopting decoder proposed in this paper, As of data is resolved automatically by internal logic of decoder in case of continuous mode, and by external As line withoug extra redudancy data in burst mode case. So, decoding parts are simple in continuous mode and transmission efficiency is increased in bust mode. The features of this chip are full duplex operation with independent transmit and receive control and clocks, start/stop inputs for use in burst mode systems, loopback function to verify encoder and decoder, and internal or external control to resolve ambinguity state. For verification of the function and performance of a fabricated ASIC chip, we equiped this chip in the Central and Remote Earth Station of VSAT system, and did the performance test using the commerical INTELSAT VII under the real satellite link environmens. The results of test were demonstrated the superiority of performance.

• Journal of the Korea Institute of Military Science and Technology
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• v.21 no.1
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• pp.115-123
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• 2018

In this paper, we consider the applicability of time-hopping(TH) systems for anti-jamming(AJ) communication. We first briefly summarize fundamentals of TH systems and several common jamming scenarios that have been considered in the literature. We then analyze the AJ performance of TH systems under those common jamming environments. From our simulation results, we reveal that among narrow band, partial band, broadband, and sweep jamming, partial band and sweep jamming are the best ones from jammer perspective. For the partial band jamming case, we show that the most effective bandwidth ratio and location are 50 % and 2.5-3.5 Ghz, respectively. For the sweep jamming case, we illustrate that the AJ performance of the TH system is enhanced when the sweep duration approaches to the bit duration. In addition, we pointed out that the most efficient jamming bandwidth ratio is 1/2. Finally, our results show that the TH-BPSK system greatly outperforms the TH-PPM counterpart.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.20 no.9
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• pp.868-882
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• 2009

In this paper, channel model and wireless link performance analysis for the short-range wireless communication system applications in the terahertz frequency which is currently interested in many countries will be described. In order to realize high data rates above 10 Gbps, the more wide bandwidths will be required than the currently available bandwidths of millimeter-wave frequencies, therefore, the carrier frequencies will be pushed to THz range to obtain larger bandwidths. From the THz atmospheric propagation characteristics based on ITU-R P.676-7, the available bandwidths were calculated to be 68, 48 and 45 GHz at the center frequencies of 220, 300 and 350 GHz, respectively. With these larger bandwidths, it was shown from the simulation that higher data rate above 10 Gbps can be achieved using lower order modulation schemes which have spectral efficiency of below 1. The indoor propagation delay spread characteristics were analyzed using a simplified PDP model with respect to building materials. The RMS delay spread was calculated to be 9.23 ns in a room size of $6\;m(L){\times}5\;m(W){\times}2.5\;m(H)$ for the concrete plaster with TE polarization, which is a similar result of below 10 ns from the Ray-Tracing simulation in the reference paper. The indoor wireless link performance analysis results showed that receiver sensitivity was $-56{\sim}-46\;dBm$ over bandwidth of $5{\sim}50\;GHz$ and antenna gain was calculated to be $26.6{\sim}31.6\;dBi$ at link distance of 10m under the BPSK modulation scheme. The maximum achievable data rates were estimated to be 30, 16 and 12 Gbps at the carrier frequencies of 220, 300 and 350 GHz, respectively, under the A WGN and LOS conditions, where it was assumed that the output power of the transmitter is -15 dBm and link distance of 1 m with BER of $10^{-12}$. If the output power of transmitter is increased, the more higher data rate can be achieved than the above results.

• Proceedings of the Korean Institute of Navigation and Port Research Conference
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• v.2
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• pp.385-390
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• 2006

This paper examines the sampling and jitter specifications and considerations for Global Navigation Satellite Systems (GNSS) software receivers. Software radio (SWR) technologies are being used in the implementation of communication receivers in general and GNSS receivers in particular. With the advent of new GPS signals, and a range of new Galileo and GLONASS signals soon becoming available, GNSS is an application where SWR and software-defined radio (SDR) are likely to have an impact. The sampling process is critical for SWR receivers, where it occurs as close to the antenna as possible. One way to achieve this is by BandPass Sampling (BPS), which is an undersampling technique that exploits aliasing to perform downconversion. BPS enables removal of the IF stage in the radio receiver. The sampling frequency is a very important factor since it influences both receiver performance and implementation efficiency. However, the design of BPS can result in degradation of Signal-to-Noise Ratio (SNR) due to the out-of-band noise being aliased. Important to the specification of both the ADC and its clocking Phase- Locked Loop (PLL) is jitter. Contributing to the system jitter are the aperture jitter of the sample-and-hold switch at the input of ADC and the sampling-clock jitter. Aperture jitter effects have usually been modeled as additive noise, based on a sinusoidal input signal, and limits the achievable Signal-to-Noise Ratio (SNR). Jitter in the sampled signal has several sources: phase noise in the Voltage-Controlled Oscillator (VCO) within the sampling PLL, jitter introduced by variations in the period of the frequency divider used in the sampling PLL and cross-talk from the lock line running parallel to signal lines. Jitter in the sampling process directly acts to degrade the noise floor and selectivity of receiver. Choosing an appropriate VCO for a SWR system is not as simple as finding one with right oscillator frequency. Similarly, it is important to specify the right jitter performance for the ADC. In this paper, the allowable sampling frequencies are calculated and analyzed for the multiple frequency BPS software radio GNSS receivers. The SNR degradation due to jitter in a BPSK system is calculated and required jitter standard deviation allowable for each GNSS band of interest is evaluated. Furthermore, in this paper we have investigated the sources of jitter and a basic jitter budget is calculated that could assist in the design of multiple frequency SWR GNSS receivers. We examine different ADCs and PLLs available in the market and compare known performance with the calculated budget. The results obtained are therefore directly applicable to SWR GNSS receiver design.