• ETRI Journal
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• 제42권3호
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• pp.351-365
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• 2020

Directional sensor networks (DSNs) can significantly improve the performance of a network by employing energy efficient communication protocols. Neighbor discovery is a vital part of medium access control (MAC) and routing protocol, which influences the establishment of communication between neighboring nodes. Neighbor discovery is a challenging task in DSNs due to the limited coverage provided by directional antennas. Furthermore, in these networks, communication can only take place when the beams of the directional antennas are pointed toward each other. In this article, we propose a novel multiple token-based neighbor discovery (MuND) protocol, in which multiple tokens are transmitted based on an area exploration algorithm. The performance of the protocol is evaluated using the Cooja simulator. The simulation results reveal that the proposed MuND protocol achieves lower neighbor discovery latency, with a 100% neighbor discovery ratio, and has a relatively low communication overhead and low energy consumption.

• 전자공학회논문지CI
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• 제38권6호
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• pp.93-105
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• 2001

격자 벡터 양자화의 비 손실 과정에서는 생성된 코드단어들을 radius 열과 Index 열로 열거한다. radius 열은 run-length 부호화한 한 다음 Entropy 부호화한다. 또한 index 열들은 이진의 고정길이로 표현한다. 비트율이 증가함에 따라 index 비트는 선형적으로 증가하여서 부호화 성능을 감소시킨다. 이 논문에서는, 넓은 비트율의 범위에서 index 비트를 줄이기 위해서, set partitioning 방식을 채택한 새로운 열거 알고리즘을 개발하였다. 제안된 열거 방법은 큰 index 값을 작은 값들을 천이 시켜서 index 비트를 줄인다. 제안된 비손실 기법을 웨이블릿 기반의 영상 부호화에 적용시켰을 때, 0.3 bits/pixel 이상의 비트룰에서 기존의 비손실 부호화 방식보다 10%이상의 비트율을 감소시켰다.

• 한국멀티미디어학회:학술대회논문집
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• 한국멀티미디어학회 2000년도 춘계학술발표논문집
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• pp.65.1-70
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• 2000

최근 인터넷 사용자의 증가와 인터넷을 이용한 전자상거래가 활발해지면서 TCP/IP 통신 보안에대한 많은 연구들이 진행되고 있다. 이러한 연구들중 SSL(Secure Socket Layer) 은 인증 및 보안 프로토콜로서 인터넷을 이용한 통신 보안에 가장 많이 사용되고있는 방법이다. 본 논문에서는 국내 암호 알고리즘의 표준으로 채택된 SEED 알고리즘을 SSL에 적용하여 서버와 클라이언트의 통신을 128bits 암호화할 수 있는 SSL-Proxy 프로그램을 구현하였으며, Windows 와 Unix 시스템에 모두 적용 가능하도록 모듈화하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1988년도 전기.전자공학 학술대회 논문집
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• pp.607-611
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• 1988

In this paper, a text compression method is proposed which is capable of reducing mean bits per character by word and etymology dictionary. This dictionary consists of 256 words and 512 etymologies with 10 bits length codes. Using this dictionary, a mean rate of 3.44 bits per character is achieved.

• Bulletin of the Korean Chemical Society
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• 제33권9호
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• pp.2930-2936
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• 2012

A three-dimensional pharmacophore hypothesis was developed for atypical antipsychotics in order to map common structural features of highly active compounds by using HipHop in CATALYST program. The pharmacophore hypotheses were generated using 12 compounds as training set and validated using 11 compounds as test set. The most predictive hypothesis (Hypo1) comprises five features viz. two hydrophobic regions, two hydrogen bond acceptor lipid and one aromatic ring. In the absence of information like crystallized structure of 5-$HT_{2A}$ receptor and binding mode of antipsychotics with 5-$HT_{2A}$ receptor, this hypothesis will serve as a potentially valuable tool in the design of novel atypical antipsychotics acting primarily at 5-$HT_{2A}$ and $D_2$ receptors.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 하계종합학술대회 논문집(1)
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• pp.69-72
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• 2000

This paper shows the more improved design of MRI receiver compared to conventional one based on Elscint Spectrometer. At first, the low-cost ADC is 16 bits, 3MHz sampling A/D converter Comparing to conventional one with signal bits of 14 bits, this device with those of 16 bits helps getting Improved the image resolution improved. If frequency is designed centering around 7.6 MHz to be satisfied in 10 MHz of maximum input bandwidth of ADC. For 1st demodulation, fixed IF is used for the purpose of the implementing multi nuclei system. Control parts & partial digital parts are integrated on one chip(FPGA). In DDC(Digital Down Converter), we got required bandwidth of LPF by controlling its decimation rate. With above considerations, we designed optimal receiver for high resolution imaging to be implemented through PC interface & experimental test of receiver of MRI after receiver's fabrication.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 추계종합학술대회 논문집(4)
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• pp.101-104
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• 2000

An efficient bit rate distribution technique that distributes available bits for multiple objects based on motion vector magnitude, size of object shape, and coding distortion is presented. This coding concept using the three parameters was exploited in MPEG-4 multiple object coding. But the scheme is likely to produce poor results such as allocating more bits to less important objects and degrading picture quality, due to the lack of analysis and research in view of human visual aspect. In this paper importance of each object is represented by the three parameters and visually analyzed. Target bits are distributed according to coding distortion using the pre-assigned shape and motion information.

• ETRI Journal
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• 제36권1호
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• pp.171-174
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• 2014

In weighted bit-flipping-based algorithms for low-density parity-check (LDPC) codes, due to the existence of overconfident incorrectly received bits, the metric values of the corresponding bits will always be wrong in the decoding process. Since these bits cannot be flipped, decoding failure results. To solve this problem, an improved parallel weighted bit flipping algorithm is proposed. Specifically, a reliability-saturation strategy is adopted to increase the flipping probability of the overconfident incorrectly received bits. Simulation results show that the error floor of LDPC codes is greatly lowered.

• 한국정보통신학회논문지
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• 제4권5호
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• pp.1085-1093
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• 2000

이 논문에서는 객체의 크기, 움직임의 크기, 부호화 왜곡을 기준으로 다중객체간 가용비트를 효과적으로 분배하는 기법을 제안하였다. 세 변수를 이용하여 부호화하는 개념은 MPEG-4에서 다중객체를 부호화하는 데에 이용되었다. 그러나 변수들을 시각적인 관점에서 분석하여 이용하는 연구가 미흡하여 시각적으로 중요하지 않은 객체에 많은 비트가 할당되어 화질이 저하되는 결과를 초래하였다. 따라서 이 논문에서는 객체의 중요성을 세 가지 변수로 표현하고 시각적으로 비교하였다. 크기 및 움직임 정보는 입력 영상에서 미리 주어지고 왜곡량에 따라 비트를 분배하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제15권5호
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• pp.445-454
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• 2015

As the feature sizes and the operating charges continue to be scaled down, multi-bit soft errors are becoming more critical in SRAM designs of a few nanometers. In this paper, we propose an efficient error detection technique to reduce the size of parity bits by applying a 2D bit-interleaving technique to 3D bit-partitioned SRAM devices. Our proposed bit-interleaving technique uses only 1/K (where K is the number of dies) parity bits, compared with conventional bit-interleaving structures. Our simulation results show that 1/K parity bits are needed with only a 0.024-0.036% detection error increased over that of the existing bit-interleaving method. It is also possible for our technique to improve the burst error coverage, by adding more parity bits.