• 전자공학회논문지 IE
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• v.43 no.2
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• pp.70-74
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• 2006

The performance of conventional direct sequence code division multiple access (DS-CDMA) systems is decreased under environments such as additive white Gaussian noise (AWGN), channel distortion and interference noise due to multiple access user. By means of this parameter, auto correlation value of pseudo noise spreading sequence is decreased at receiver. This techniques which are based on correlation of between signature waveform signal. In this paper, to improve correlation property, we proposed the binary chirp DS-CDMA techniques which combine the DS-CDMA and chirp modulation. The proposed system which is based on binary chirp symbol has a good correlation value. Thus, we called BC DS-CDMA. To evaluate the system's performance, we compare the performance of the proposed systems with DS-CDMA systems under AWGN channel and halogen noise which exists on the powerline. The simulation results show that the proposed method has better performance than conventional technique.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.2 s.117
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• pp.213-218
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• 2007

In this paper, we propose the design and fabrication on high frequency CMOS VCO for DS-UWB(Direct-Sequence Ultra-WideBand) applications using 0.18 ${\mu}m$ process. The complementary cross-coupled LC oscillator architecture which is composed of PMOS, NMOS symmetrically, is designed for improving the phase noise characteristic. The resistor is used instead of current source that reduce the 1/f noise of current source. The high-speed buffer is needed for measuring the output characteristic of VCO using spectrum analyzer, therefore the high-speed inverter buffer is designed with VCO. A fabricated core VCO size is $340{\mu}m{\times}535{\mu}m$. The VCO is tunable between 7.09 and 7.52 GHz and has a phase noise lower than -107 dBc/Hz at 1-MHz offset over entire tuning range. The measured harmonic suppression is 32 dB. The VCO core circuit draws 2.0 mA from a 1.8 V supply.