• Title/Summary/Keyword: Automatic Gate System

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Performance-driven Automatic Logic Synthesis System (성능 구동 논리 회로 자동 설계 시스템)

  • 이재형;황선영
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.28A no.1
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    • pp.74-84
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    • 1991
  • This paper presents an algorithm for technology-dependent logic optimization and technology mapping, and describes a performance-driven logic synthesis system, SILOS, implemented based on the proposed algorithm. The system analyzes circuits and resynthesizes the critical sections such that generated circuit operates opertes within time constraints, using only gate types supported by library for direct implementation. Experimental results show that the system can be a viable tool in synthesizing high-performance logic circuits.

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FBDtoVHDL: An Automatic Translation from FBD into VHDL for FPGA Development (FBDtoVHDL: FPGA 개발을 위한 FBD에서 VHDL로의 자동 변환)

  • Kim, Jaeyeob;Kim, Eui-Sub;Yoo, Junbeom;Lee, Young Jun;Choi, Jong-Gyun
    • Journal of KIISE
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    • v.43 no.5
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    • pp.569-578
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    • 2016
  • The PLC (Programmable Logic Controller) has been widely used for the development of digital control system of nuclear power plant. The PLC has high maintenance costs and increasing complexity, hence, FPGA (Field Programmable Gate Array) based digital control system has been considered as an alternative. However, the development of FPGA based digital control system is a challenge for PLC engineers because they are required to learn about new language to develop FPGA and knowledge and know-how acquired in the development of PLC is not transferable. In this study, we proposed and implemented an automatic translation tool for translation of FBD (Function Block Diagram), a programming language of PLC software, into VHDL (VHSIC Hardware Description Language). Automatically translating the FBD to VHDL using this tool allows PLC engineers to develop FPGA without any knowledge of the hardware description language.

Development of One-channel Gamma ray spectroscope for Automatic Radiopharmaceutical Synthesis System (방사성 의약품 자동합성장치용 단채널 감마선 분광기 보드의 설계 및 제작)

  • Song, Kwanhoon;Kim, Kwangsoo
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.4
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    • pp.193-200
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    • 2014
  • In this paper, the prototype of one-channel gamma-ray spectroscope for automatic radiopharmaceutical systhesis system was designed and characterized. The prototype employed CZT (CdZnTe) spear detector for gamma-ray detection and employed analog-type signal processing method. A radioactive sample Co-60 was used for measuring performance of the gamma-ray spectroscope and energy spectrum is gained with bandwidth of 1173keV. The analog board is made up of SF (shaping filter) and PHA (peak and hold amplifier) for shaping CZT output signal appropriately and ADC (analog to digital converter) and FPGA (field programmable gate array) for drawing gamma-ray spectrum by counting the digitalized gamma-ray signal data.

Development of RF system for Automatic Container Terminal (한국형 컨테이너 터미널 자동화를 위한 RF 시스템 개발)

  • 윤현성;이창호;변건식
    • Proceedings of the Korea Institute of Convergence Signal Processing
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    • 2000.12a
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    • pp.41-44
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    • 2000
  • In this paper, the dedicated short range communication(DSRC) system which used as the automatic gate system(AGS) Donga Univ. RRC developed is applied to yard automation. We proposed the communication algorithm of between roadside equipment(RSE) and on-board equipment(OBE). We analyzed transmitted and received information, classification and feature of between OBE and RSE for automation of the container yard and unloading system.

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Design of an Automatic Placement System for PCBs (PCB 자동 배치 시스템의 설계)

  • 장명수;이장순;황선영
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.31A no.2
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    • pp.104-115
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    • 1994
  • This paper presents the design of a placement sysyem integrated in PCB design system. to get an optimal component positioning from part and net list. Unplaced components are placed in initial process using modified cluster development algorithm and are swapped in improvement process using the GFDR(Generalized Force Directed Relaxation) algorithm. The result is optimized in post process by component rotating or pin/gate swapping. Experimental results shwo that the placement system produces manufacturable layouts which are optimal in terms of total routing length.

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Implementation of Efficient Container Number Recognition System at Automatic Transfer Crane in Container Terminal Yard (항만 야드 자동화크레인(ATC)에서 효율적인 컨테이너번호 인식시스템 개발)

  • Hong, Dong-Hee
    • Journal of the Korea Society of Computer and Information
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    • v.15 no.9
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    • pp.57-65
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    • 2010
  • This paper describes the method of efficient container number recognition in colored container image with number plate at ATC(Automatic Transfer Crane) in container terminal yard. At the Sinseondae terminal gate in Busan, the container number recognition system is installed by "intelligent port-logistics system technology development", that is government research and development project. It is the method that it sets up the tunnel structure inside camera on the gate and it recognizes the container number in order to recognize the export container cargo automatically. However, as the automation equipment is introduced to the container terminal and the unmanned of a task is gradually accomplished, the container number recognition system for the confirmation of the object of work is required at ATC in container terminal yard. Therefore, the container number recognition system fitted for it is necessary for ATC in container terminal yard in which there are many intrusive of the character recognition through image including a sunlight, rain, snow, shadow, and etc. unlike the gate. In this paper, hardware components of the camera, illumination, and sensor lamp were altered and software elements of an algorithm were changed. that is, the difference of the brightness of the surrounding environment, and etc. were regulated for recognize a container number. Through this, a shadow problem, and etc. that it is thickly below hung with the sunlight or the cargo equipment were solved and the recognition time was shortened and the recognition rate was raised.

Design of the timing controller for automatic magnetizing system

  • Yi Jae Young;Arit Thammano;Yi Cheon Hee
    • Proceedings of the IEEK Conference
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    • 2004.08c
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    • pp.468-472
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    • 2004
  • In this paper a VLSI design for the automatic magnetizing system has been presented. This is the design of a peripheral controller, which magnetizes CRTs and computers monitors and controls the automatic inspection system. We implemented a programmable peripheral interface(PPI) circuit of the control and protocol module for the magnetizer controller by using a O.8um CMOS SOG(Sea of Gate) technology of ETRI. Most of the PPI functions has been confirmed. In the conventional method, the propagation/ramp delay model was used to predict the delay of cells, but used to model on only a single cell. Later, a modified "apos;Linear delay predict model"apos; was suggested in the LODECAP(LOgic Design Capture) by adding some factors to the prior model. But this has not a full model on the delay chain. In this paper a new "apos;delay predict equationapos;" for the design of the timing control block in PPI system has been suggested. We have described the detail method on a design of delay chain block according to the extracted equation and applied this method to the timing control block design.

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Sensorless Sine-Wave Controller IC for PM Brushless Motor Employing Automatic Lead-Angle Compensation

  • Kim, Minki;Heo, Sewan;Oh, Jimin;Suk, Jung-Hee;Yang, Yil Suk;Park, Ki-Tae;Kim, Jinsung
    • ETRI Journal
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    • v.37 no.6
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    • pp.1165-1175
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    • 2015
  • This paper presents an advanced sensorless permanent magnet (PM) brushless motor controller integrated circuit (IC) employing an automatic lead-angle compensator. The proposed IC is composed of not only a sensorless sine-wave motor controller but also an isolated gate-driver and current self-sensing circuit. The fabricated IC operates in sensorless mode using a position estimator based on a sliding mode observer and an open-loop start-up. For high efficiency PM brushless motor driving, an automatic lead-angle control algorithm is employed, which improves the efficiency of a PM brushless motor system by tracking the minimum copper loss under various load and speed conditions. The fabricated IC is evaluated experimentally using a commercial 200 W PM brushless motor and power switches. The proposed IC is successfully operated without any additional sensors, and the proposed algorithm maintains the minimum current and maximum system efficiency under $0N{\cdot}m$ to $0.8N{\cdot}m$ load conditions. The proposed IC is a feasible sensorless speed controller for various applications with a wide range of load and speed conditions.

FPGA-Based Hardware Accelerator for Feature Extraction in Automatic Speech Recognition

  • Choo, Chang;Chang, Young-Uk;Moon, Il-Young
    • Journal of information and communication convergence engineering
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    • v.13 no.3
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    • pp.145-151
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    • 2015
  • We describe in this paper a hardware-based improvement scheme of a real-time automatic speech recognition (ASR) system with respect to speed by designing a parallel feature extraction algorithm on a Field-Programmable Gate Array (FPGA). A computationally intensive block in the algorithm is identified implemented in hardware logic on the FPGA. One such block is mel-frequency cepstrum coefficient (MFCC) algorithm used for feature extraction process. We demonstrate that the FPGA platform may perform efficient feature extraction computation in the speech recognition system as compared to the generalpurpose CPU including the ARM processor. The Xilinx Zynq-7000 System on Chip (SoC) platform is used for the MFCC implementation. From this implementation described in this paper, we confirmed that the FPGA platform is approximately 500× faster than a sequential CPU implementation and 60× faster than a sequential ARM implementation. We thus verified that a parallelized and optimized MFCC architecture on the FPGA platform may significantly improve the execution time of an ASR system, compared to the CPU and ARM platforms.

A Study of Light Train AFC System Planing (경전철에서 역무자동설비 설계 방안)

  • Lee, Jung-Ju;Lee, Soo-Young
    • Proceedings of the KSR Conference
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    • 2007.11a
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    • pp.1574-1585
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    • 2007
  • In the more and more continues traffic difficulty which comes to be serious it is for solve, in order to like this used plan for new town light train automatic fare collection system, the city development which is balance and the passenger whom it uses, in consequence of the fact that recently believer instruction, the automatic fare collection system the reverse which is convenient is used in the scripture season which is embossed with means it introduces it operates and a manpower with the scientific service control which leads the electric computer anger of passenger service improvement and accounting and statistical business it reduces, the use is convenient and the possibility facility of operating efficiently in rational plan in order to be, description below for the service automation equipment where the efficiency improves it is. Service automation equipment uses a scripture season to be the first boundary gate of the passenger, there must be a place where it uses a service automation facility and in order to be convenient, it considers the moving area and a wait of the reverse station passenger moving area and the space where, must secure the automatic fare collection system which it follows in automation of facility and the service operation of the reverse station which is ticket sale, the collection of tickets back the passenger is convenient and in order it will be able to use, must do and must consider, must arrange the efficient characteristic of the maintenance civil official services.

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