• 제목/요약/키워드: Asymmetric capacitor

검색결과 43건 처리시간 0.019초

A New Single-Stage PFC AC/DC Converter with Low Link-Capacitor Voltage

  • Lee, Byoung-Hee;Kim, Chong-Eun;Park, Ki-Bum;Moon, Gun-Woo
    • Journal of Power Electronics
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    • 제7권4호
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    • pp.328-335
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    • 2007
  • A conventional Single-Stage Power-Factor-Correction (PFC) AC/DC converter has a link capacitor voltage problem under high line input and low load conditions. In this paper, this problem is analyzed by using the voltage conversion ratio of the DC/DC conversion cell. By applying this analysis, a new Single-Stage PFC AC/DC converter with a boost PFC cell integrated with a Voltage-Doubler Rectified Asymmetrical Half-Bridge (VDRAHB) is proposed. The proposed converter features good power factor correction, low current harmonic distortions, tight output regulations and low voltage of the link capacitor. An 85W prototype was implemented to show that it meets harmonic requirements and standards satisfactorily with near unity power factor and high efficiency over universal input.

X-ray and Plasma Process Induced Damages to PLZT Capacitor Characteristics for DRAM Applications

  • Kim, Jiyoung
    • The Korean Journal of Ceramics
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    • 제3권3호
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    • pp.213-217
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    • 1997
  • In this paper, the imparct of X-ray and plasma process-induced-damages to La doped Lead Zirconate Titanate (PLZT, (Pb1-xLa)(Zr0.5Ti0.5)O3) capacitor characteristics have been investigated from the viewpoint of gigabit scale dynamic random access memory (DRAM) applications. Plamsa damage causes asymmetric degradation on hysteresis characteristics of PLZT films. On the other hand, X-ray damage results in a symmetrical reduction of charge storage densities (Qc's) for both polarities. As La concentration increases in the films, the radiation hardness of PLZT films on X-ray and plasma exposures is improved. It is observed that the damaged devices are fully recovered by thermal annealing under oxygen ambient.

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Experimental Investigation of Laser Spot Welding of Ni and Au-Sn-Ni Alloy

  • Lee, Dongkyoung
    • Journal of Welding and Joining
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    • 제35권2호
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    • pp.1-5
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    • 2017
  • Many microelectronic devices are miniaturizing the capacitance density and the size of the capacitor. Along with this miniaturization of electronic circuits, tantalum (Ta) capacitors have been on the market due to its large demands worldwide and advantages such as high volumetric efficiency, low temperature coefficient of capacitance, high stability and reliability. During a tantalum capacitor manufacturing process, arc welding has been used to weld base frame and sub frame. This arc welding may have limitations since the downsizing of the weldment depends on the size of welding electrode and the contact time may prevent from improving productivity. Therefore, to solve these problems, this study applies laser spot welding to weld nickel (Ni) and Au-Sn-Ni alloy using CW IR fiber laser with lap joint geometry. All laser parameters are fixed and the only control variable is laser irradiance time. Four different shapes, such as no melting upper workpiece, asymmetric spherical-shaped weldment, symmetric weldment, and, excessive weldment, are observed. This shape may be due to different temperature distribution and flow pattern during the laser spot cutting.

고 출력 응용을 위한 2개의 전송영점을 가지는 최소화된 SOI CMOS 가변 대역 통과 여파기 (SOI CMOS Miniaturized Tunable Bandpass Filter with Two Transmission zeros for High Power Application)

  • 임도경;임동구
    • 전자공학회논문지
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    • 제50권1호
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    • pp.174-179
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    • 2013
  • 이 논문에서는 multiple split ring resonator(MSRRs)와 로딩된 스위치드 제어부를 이용하여 2개의 전송영점을 가지는 대역통과 여파기를 설계하였다. 높은 선택도와 칩 사이즈의 초소형화를 위해 비대칭의 급전 선로를 도입하여 통과 대역 주위에 위치한 전송 영점 쌍을 생성하였다. Cross coupling 또는 source-load coupling 방식을 이용한 기존의 여파기와 비교해보면 이 논문에서 제안된 여파기는 단지 2개의 공진기만으로 전송 영점을 생성하여 높은 선택도를 얻었다. 여파기의 선택도와 민감도(삽입 손실)를 최적화하기 위해 비대칭 급전 선로의 위치에 따른 전송 영점과 삽입손실의 관계를 분석하였다. 통과 대역 주파수의 가변과 30dBm 정도의 고 출력 신호를 처리하기 위해 MSRRs의 최 외각 링에 MIM 커패시터와 stacked-FET으로 구성된 SOI-CMOS 스위치드 제어부가 로딩되어 있다. 스위칭 트랜지스터의 전원을 켜고 끔으로써 통과 대역 주파수를 4GHz로부터 5GHz까지 이동시킬 수 있다. 제안된 칩 여파기는 0.18-${\mu}m$ SOI CMOS 기술을 이용함으로써 높은 Q를 가지는 수동 소자와 stacked-FET의 집적을 가능하게 만들었다. 설계된 여파기는 $4mm{\times}2mm$ ($0.177{\lambda}g{\times}0.088{\lambda}g$)의 초소형화 된 크기를 가진다. 여기서 ${\lambda}g$는 중심 주파수에서의 $50{\Omega}$ 마이크로스트립 선로의 관내 파장을 나타낸다. 측정된 삽입손실(S21)은 5.4GHz, 4.5GHz에서 각 각 5.1dB, 6.9dB를 나타내었다. 설계된 여파기는 중심 주파수로부터 500MHz의 오프셋에서 20dB이상의 대역외 저지 특성을 나타내었다.

Analysis and Control of NPC-3L Inverter Fed Dual Three-Phase PMSM Drives Considering their Asymmetric Factors

  • Chen, Jian;Wang, Zheng;Wang, Yibo;Cheng, Ming
    • Journal of Power Electronics
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    • 제17권6호
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    • pp.1500-1511
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    • 2017
  • The purpose of this paper is to study a high-performance control scheme for neutral-point-clamping three-level (NPC-3L) inverter fed dual three-phase permanent magnet synchronous motor (PMSM) drives by considering some asymmetric factors such as the non-identical parameters in phase windings. To implement this, the system model is analyzed for dual three-phase PMSM drives with asymmetric factors based on the vector space decomposition (VSD) principle. Based on the equivalent circuits, PI controllers with feedforward compensation are used in the d-q subspace for regulating torque, where the cut-off frequency of the PI controllers are set at the twice the fundamental frequency for compensating both the additional DC component and the second order component caused by asymmetry. Meanwhile, proportional resonant (PR) controllers are proposed in the x-y subspace for suppressing the possible unbalanced currents in the phase windings. A dual three-phase space vector modulation (DT-SVM) is designed for the drive, and the balancing factor is designed based on the numerical fitting surface for balancing the DC link capacitor voltages. Experimental results are given to demonstrate the validity of the theoretical analysis and the proposed control scheme.

Design and Verification of Improved Cascaded Multilevel Inverter Topology with Asymmetric DC Sources

  • Tarmizi, Tarmizi;Taib, Soib;Desa, M.K. Mat
    • Journal of Power Electronics
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    • 제19권5호
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    • pp.1074-1086
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    • 2019
  • This paper presents the design and implementation of an improved cascaded multilevel inverter topology with asymmetric DC sources. This experimental inverter topology is a stand-alone system with simulations and experiments performed using resistance loads. The topology uses four asymmetric binary DC sources that are independent from each other and one H-bridge. The topology was simulated using PSIM software before an actual prototype circuit was tested. The proposed topology was shown to be very efficient. It was able to generate a smooth output waveform up to 31 levels with only eight switches. The obtained simulation and experimental results are almost identical. In a 1,200W ($48.3{\Omega}$) resistive load application, the THDv and efficiency of the topology were found to be 1.7% and 97%, respectively. In inductive load applications, the THDv values were 1.1% and 1.3% for an inductive load ($R=54{\Omega}$ dan L=146mH) and a 36W fluorescent lamp load with a capacitor connected at the dc bus.

고속 SRM 구동시스템 설계 (Design of High Speed Drive)

  • 김태형;안영주;이동희;안진우
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2006년도 춘계학술대회 논문집 전기기기 및 에너지변환시스템부문
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    • pp.95-98
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    • 2006
  • This paper proposes high speed SRM drive system for blower with a new 4-level inverter and precise excitation position generator. For the high speed blower, a proper inverter and control method are proposed and the output characteristics are analyzed. In order to get a fast build-up and demagnetization of excitation a current, 4-level inverter system is proposed. The proposed 4-level inverter has additional charge capacitor, power switch and diode in the conventional asymmetric converter. The charged high voltage is supplied to the phase winding for fast current build-up, and demagnetization current is charged to additional capacitor of 4-level inverter. In addition, a precise excitation position generator can reduce turn-on and turn-off angle error according to sampling period of digital control system. The proposed high speed SRM drive system is verified by computer simulation and experimental result.

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The characteristics of MIS BST thin film capacitor

  • Park, Chi-Sun;Kim, In-Ki
    • 한국결정성장학회지
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    • 제11권1호
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    • pp.38-42
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    • 2001
  • Electric and dielectric(Ba,Sr)$TiO_3$[BST] thin films for emtal-Insulator-Semiconductor(MIS) capacitors have been studied. BST thin films wre deposted on p-Si(100) substrates bythe RF magnetron sputtering with tempratue range of 500~$600^{\circ}C$. The dielectric properties of MIS capacitors consisting of Al/BST/$SiO_2$/Si sandwich structure were evaluated ot redcue the leakage current density. The charge state densities of the MIS capacitors were determined by high frequency (1 MHz) C-V measurement. In order to reduce the leakage current in MIS capacitor, high quality $SiO_2$ layer was deposited on bare p-Si substrate. Depending on the oxygen pressure and substrate temperature both positive and negative polarities of effective oxide charge in the MIS capacitors were evaluated. It is considered that the density of electronic states, generated at the BST/$SiO_2$/p-Si interface due to the asymmetric structure within BST/$SiO_2$/Si structure, and the oxygen vacancy content has influence on the behavior of oxide charge.

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SRM의 고속구동을 위한 제어시스템 설계 (A Design of High Speed SRM Drive System)

  • 이주현;이동희;안진우
    • 대한전기학회논문지:전기기기및에너지변환시스템부문B
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    • 제55권7호
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    • pp.337-345
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    • 2006
  • This paper proposes a high speed SRM drive system for blower application with a new 4-level inverter and precise excitation position generator. For a high speed blower, a proper inverter and control method are proposed and the output characteristics are analyzed. In order to get a fast build-up and demagnetization of excitation current, a 4-level inverter system is proposed. The proposed 4-level inverter has additional charge capacitor, power switch and diode in the conventional asymmetric converter. The charged high voltage is supplied to the phase winding for fast current build-up, and demagnetization current is charged to additional capacitor of the 4-level inverter. In addition, a precise excitation position generator can reduce turn-on and turn-off angle error according to sampling period of digital control system. The proposed high speed SRM drive system is verified by computer simulation and experimental results.

고속 SRM 구동 시스템 설계 (A Design of High Speed SRM Drive System)

  • 이주현;김봉철;이동희;안진우
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2005년도 추계학술대회 논문집 전기기기 및 에너지변환시스템부문
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    • pp.110-113
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    • 2005
  • This paper proposes high speed SRM drive system for blower with a new 4-level inverter and precise excitation position generator. For the high speed blower, a proper 12/8 SRM is designed and analyzed. In order to get a fast build-up and demagnetization of excitation a current, now 4-level inverter system is proposed. The proposed 4-level inverter has additional charge capacitor, power switch and diode in the conventional asymmetric converter. The charged high voltage is supplied to the phase winding for fast current build-up, and demagnetization current is charged to additional capacitor of 4-level inverter. In addition, a precise excitation position generator can reduce turn-on and turn-off angle error according to sampling period of digital control system. The proposed high speed SRM drive system is verified by computer simulation.

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