• Nuclear Engineering and Technology
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• v.48 no.4
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• pp.1047-1057
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• 2016

Design engineering process for field programmable gate array (FPGA)-based reactor trip functions are developed in this work. The process discussed in this work is based on the systems engineering approach. The overall design process is effectively implemented by combining with design and implementation processes. It transforms its overall development process from traditional V-model to Y-model. This approach gives the benefit of concurrent engineering of design work with software implementation. As a result, it reduces development time and effort. The design engineering process consisted of five activities, which are performed and discussed: needs/systems analysis; requirement analysis; functional analysis; design synthesis; and design verification and validation. Those activities are used to develop FPGA-based reactor bistable trip functions that trigger reactor trip when the process input value exceeds the setpoint. To implement design synthesis effectively, a model-based design technique is implied. The finite-state machine with data path structural modeling technique together with very high speed integrated circuit hardware description language and the Aldec Active-HDL tool are used to design, model, and verify the reactor bistable trip functions for nuclear power plants.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.24 no.9
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• pp.1165-1171
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• 2020

In this study, we designed a single antenna taking into account the performance, such as return loss and radiation pattern, of 28 GHz and 38 GHz array antennas for 5G mobile devices. In millimeter wave band communication, high path loss occurs between transmission and reception, unlike in conventional microwave bands. In the design of array antennas for 5G millimeter wave terminals, antenna performance such as antenna gain, bandwidth, isolation between antenna elements, side-lobe level(SLL), etc. should be further considered. The performance of the designed array antennas was analyzed by spacing the antenna elements at half a wavelength. Our results proved the validity of the design and its suitability for applications in mm-Wave by showing that the 28 GHz and 39 GHz array antennas had antenna gains of 13.5 dBi and 11.3 dBi and return losses below -18.4 dB and -20 dB, correspondingly.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.12
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• pp.45-52
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• 2005

A systolic array formed by interconnecting a set of identical data-processing cells in a uniform manner is a combination of an algorithm and a circuit that implements it, and is closely related conceptually to arithmetic pipeline. High-performance computation on a large array of cells has been an important feature of systolic array. To achieve even higher degree of concurrency, it is desirable to make cells of systolic array themselves systolic array as well. The structure of systolic array with its cells consisting of another systolic array is to be called super-systolic array. This paper proposes a scalable bit-level super-systolic amy which can be adopted in the VLSI design including regular interconnection and functional primitives that are typical for a systolic architecture. This architecture is focused on highly regular computational structures that avoids the need for a large number of global interconnection required in general VLSI implementation. A bit-level super-systolic FIR filter is selected as an example of bit-level super-systolic array. The derived bit-level super-systolic FIR filter has been modeled and simulated in RT level using VHDL, then synthesized using Synopsys Design Compiler based on Hynix $0.35{\mu}m$ cell library. Compared conventional word-level systolic array, the newly proposed bit-level super-systolic arrays are efficient when it comes to area and throughput.

• Journal of Integrative Natural Science
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• v.14 no.3
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• pp.73-77
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• 2021

Robust design is an approach to reduce the performance variation of mutiple responses in products and processes. In fact, in many experimental designs require the simultaneous optimization of multiple responses. In this paper, we propose how to simultaneously optimize multiple responses for robust design when data are collected from a combined array. The proposed method is based on the quadratic loss function. An example is illustrated to show the proposed method.

• Proceedings of the KIEE Conference
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• 1998.07d
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• pp.1364-1366
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• 1998

An active-matrix LCD using thin film transistors (TFT) has been widely recognized as having potential for high-quality color flat-panel displays. Pixel-Design Array Simulation Tool (PDAST) was used to profoundly understand the gate signal distortion and pixel charging capability, which are the most critical limiting factors for high-quality TFT-LCDs. Since PDAST can simulate the gate, data and pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of the resistivity of gate line material on the pixel operations can be effectively analyzed. The gate signal delay. pixel charging ratio, level-shift of the pixel voltage were simulated with varying the parameters. The information obtained from this study could be utilized to design the larger area and finer image quality panel.

• Journal of electromagnetic engineering and science
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• v.18 no.2
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• pp.108-116
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• 2018

In this paper, a method of designing a Vivaldi type phased array antenna (PAA) which operates at S-band (2.8-3.3 GHz) is presented. The presented antenna uses broadside coupled split ring resonators (BC-SRRs) for high isolation, wide field of view, and good active S-parameter characteristics. As an example, we design a $1{\times}8$ array antenna with various BC-SRR structures using theory and EM simulations. The antenna is fabricated and measured to verify the design. With the BC-SRR implemented between the two radiating elements, the isolation is shown to be enhanced by 6 dB, up to 23 dB. The scan angle is shown to be within ${\pm}53^{\circ}$ based on a -10 dB active reflection coefficient. The operation of the scan angle is possible within ${\pm}60^{\circ}$ with a little larger reflection coefficient (-7 dB to -8 dB). The proposed design with BC-SRRs is expected to be useful for PAA applications.

• The Journal of the Acoustical Society of Korea
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• v.18 no.3
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• pp.27-34
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• 1999

This paper proposes an algorithm to design the non-linear array so as to form efficiently the one-shot beam with relatively less sensors for acoustic measurement. In this algorithm, according to the spatial sampling theory the part for high frequency(HF) band has equispaced sensor array and the sensor distances below the HF band are decided as a function of number of HF sensors. As the results of the simulations, the mean and variances of directivity index(DI) of non-linear array which has less sensors are similar to those of linear array. and the DI variation for beam steering angle is very small. And the beam width at -2dB point is 6.8°. Thus it is confirmed that the design algorithm for non-linear array which is proposed to have less sensors can be efficiently used in acoustic measurement.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.25 no.1
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• pp.62-67
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• 2016

This paper presents a silicon nanostructure array embedded in a polymer film. The silicon nanostructure array was fabricated by using basic microelectromechanical systems (MEMS) processes such as photolithography, reactive ion etching, and anisotropic KOH wet etching. The fabricated silicon nanostructure array was transferred into polymer substrates such as polymethyl methacrylate (PMMA), polyethylene terephthalate (PET), and polycarbonate (PC) through the hot-embossing process. In order to determine the transfer conditions under which the silicon nanostructures do not fracture, hot-embossing experiments were performed at various temperatures, pressures, and pressing times. Transfer was successfully achieved with a pressure of 1 MPa and a temperature higher than the transition temperature for the three types of polymer substrates. The transferred silicon nanostructure array was electrically evaluated through measurements with a semiconductor parameter analyzer (SPA).

• Proceedings of the KSRS Conference
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• v.1
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• pp.220-223
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• 2006

The COMS(Communication, Ocean and Meteorological Satellite) EPS(Electrical Power Subsystem) is derived from an enhanced Eurostar 3000 EPS which is fully autonomous operation in normal conditions or in the event of a failure and provides a high level of reconfiguration capability and flexibility. This paper introduces the COMS EPS preliminary design result. The COMS EPS consists of a battery, a solar array wing, a PSR(Power Supply Regulator), a PRU(Pyrotechnic Unit), a SADM(Solar Array Drive Mechanism) and relay and fuse brackets. This can offer a bus power capability of 3 kW. The solar array is made of a deployable wing with two panels. One type of solar cells is selected as GaAs/Ge triple junction cells. Li-ion battery is base lined with ten series cell module of five cells in parallel. PSR associated with battery and solar array generates a power bus fully regulated 50 V. Power bus is centralised protection and distribution by relay and fuse brackets. PRU provides power for firing actuators devices. The solar array wing is routed by the SADM under control of the AOCS(Attitude Orbit Control Subsystem). The control and monitoring of the EPS especially of the battery, is performed by the PSR in combination with on-board software.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.63 no.12
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• pp.1732-1736
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• 2014

Generally, traction motors for railway vehicles are inferior to that of electric vehicle in terms of output density. Traction motors for railway vehicles are relatively free of spatial constraints than motors electric vehicles, but in terms of whole system efficiency, increasing output density of traction motor is helpful. In this paper, using Halbach magnet array structure, output density of traction motor for 40kW class tram was elevated. This paper introduce detailed design process of the Halbach magnet array structure applied model, and check the affects on output characteristics by parameters like rotor shape, airgap diameter and pole ratio. Also, electrical output characteristics were compared between typical SPMSM model and Halbach magnet array model, which has same output size.