• Title/Summary/Keyword: Arrangement Chip

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Visualization for racing effect and meniscus merging in underfill process (언더필 공정에서 레이싱 효과와 계면 병합에 대한 가시화)

  • Kim, Young Bae;Kim, Sungu;Sung, Jaeyong;Lee, MyeongHo
    • Journal of Advanced Marine Engineering and Technology
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    • v.37 no.4
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    • pp.351-357
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    • 2013
  • In flip chip packaging, underfill process is used to fill epoxy bonder into the gap between a chip and a substrate in order to improve the reliability of electronic devices. Underfill process by capillary motion can give rise to unwanted air void formations since the arrangement of solder bumps affects the interfacial dynamics of flow meniscus. In this paper, the unsteady flows in the capillary underfill process are visualized and then the racing effect and merging of the meniscus are investigated according to the arrangement of solder bumps. The result is shown that at higher bump density, the fluid flow perpendicular to the main direction of flow becomes stronger so that more air voids are formed. This phenomenon is more conspicuous at a staggered bump array than at a rectangular bump array.

Analysis of Women's Fitness Wear Colors -Focused on 2017 S/S- (여성 피트니스웨어 색채 분석 -2017 SS시즌을 중심으로-)

  • Kim, Ri Ra;Joo, Mi Young
    • Journal of Fashion Business
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    • v.23 no.2
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    • pp.110-123
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    • 2019
  • This study aims to investigate the color characteristics of female fitnesswear by analyzing the status of color usage and color arrangement method of each item of female fitnesswear of sports brands. This study targeted eight global total sportswear brands. A total of 2956 colors of female sportswear were collected and analyzed from the homepage of each brand. As a result of analyzing the color of fitnesswear, first, the overall color of the fitnesswear showed high distribution centered on PB, Bk and R of low color tone, such as p and dkg. Moreover, bright tone colors were added for vitality and functional image of sports. Second, as a result of analyzing the color of each item, commonly, the PB, Bk and R had large proportions. Third, as a result of analyzing 2-color arrangements of fitnesswear, color arrangements including achromatic color had overwhelmingly higher frequency than color arrangements that had only chromatic colors. This shows that the color arrangement using achromatic color is important and has a higher preference. Fourth, as a result of extracting the representative color arrangement as color chip and comparing, the 2-color arrangement of female fitnesswear had the characteristics of the color arrangement of large area main color and small amounts of emphasized color centered on achromatic colors of Bk and W. This study is meaningful that it can be utilized as basic data for color planning of fitnesswear brands by subdividing female fitnesswear into 4 items and analyzing the color-tone and arrangement.

LED Module Temperature Analysis for LED Chip Thermal Resistance Measurement (LED Chip 열저항측정을 통한 LED Module 온도분석)

  • Jeong, Hee-Suk;Yoo, Hyoung-Yul;Kim, Jeong-Su;Lee, Young-Joo
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2009.05a
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    • pp.164-167
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    • 2009
  • It is difficult to measure junction temperature in the LED Module. According to the arrangement control unit and heat sink, temperature distribution is changed in the LED Module. A method of forecasting LED Module thermal resistance is suggested with measuring LED and PCB board temperature.

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An Experimental Study on Heat Transfer Characteristics of Arrangement Chips by Swirl Jet Impingement (선회충돌제트에 의한 배열 칩의 열전달 특성에 관한 실험적 연구)

  • 최재욱;전영우;정인기;박시우
    • Journal of Advanced Marine Engineering and Technology
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    • v.28 no.4
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    • pp.624-631
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    • 2004
  • The experimental study on heat transfer characteristics of protruding heated block array as conducted to investigate and to compare the performance of impinging single circular jet in fully developed tube with a twisted tape as a swirl generator. The effects of jet Reynolds number(Re=8700, 13800, 20000. 26500), dimensionless jet-to-block distance(H/d=1. 3, 5. 7) and swirl number(S=0.11, 0.23, 0.30) of the swirl jet on the average Nusselt number for each block and all blocks have been examined. Measurements of heat transfer rate on block surfaces were used naphthalene sublimation technique. Mean velocity and turbulence intensity of the jet along the axis were measured. Potential core length of the jet was 5 times of nozzle diameter because it was fully developed and initially turbulent. With the twisted tape in the nozzle, heat transfer coefficients were higher than those without the twisted tape. which are mainly caused with increasing the jet Reynolds number and swirl number.

Development of Polarization-Controllable Active Phased Array Antenna for Receiving Satellite Broadcasting (편파가변 위성 방송 수신용 능동 위상 배열 안테나 개발)

  • Choi, Jin-Young;Lee, Ho-Seon;Kong, Tong-Ook;Chun, Jong-Hoon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.29 no.5
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    • pp.325-335
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    • 2018
  • We herein present a study on the active phased array antenna for receiving satellite broadcasting that can electrically align its polarization to that of target transmitters in its moving condition or in the Skew angle arrangement of the broadcasting satellite receiver. Hence, we have developed an active phased array structure composed of the self-developed Vivaldi antenna and multifunction core (MFC) chip, receiving RF front end module, and control units. In particular, the new Vivaldi antenna designed in the Ku-band of 10.7 - 14.5 GHz to receive one desired polarization mode such as the horizontal or vertical by means of an MFC chip and other control units that can control the amplitude and phase of each antenna element. The test results verified that cross-polarization property is 20 dB or higher and the primary beam can be scanned clearly at approximately ${\pm}60^{\circ}$.

Effects of Urea Level and Sodium DL-malate in Concentrate Containing High Cassava Chip on Ruminal Fermentation Efficiency, Microbial Protein Synthesis in Lactating Dairy Cows Raised under Tropical Condition

  • Khampa, S.;Wanapat, Metha;Wachirapakorn, C.;Nontaso, N.;Wattiaux, M.
    • Asian-Australasian Journal of Animal Sciences
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    • v.19 no.6
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    • pp.837-844
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    • 2006
  • Four, lactating dairy cows were randomly assigned according to a $2{\times}2$ Factorial arrangement in a $4{\times}4$ Latin square design to study supplementation of urea level (U) at 2 and 4% and sodium dl-malate (M) at 10 and 20 g/hd/d in concentrate. The treatments were as follows U2M10, U2M20, U4M10 and U4M20, respectively. The cows were offered the treatment concentrate at a ratio to milk yield at 1:2.5 and urea-treated rice straw was fed ad libitum. The results have revealed that rumen fermentation and blood metabolites were similar for all treatments. The populations of protozoa and fungal zoospores were significantly different as affected by urea level and sodium dl-malate. In addition, the viable bacteria were similar for amylolytic and proteolytic bacteria. Cellulolytic bacteria were significantly affected by level of sodium dl-malate especially Selenomonas ruminantium and Megasphaera elsdenii while Butyrivibrio fibrisolvens was significantly affected by level of urea supplementation. In conclusion, the combined use of concentrate containing high level of cassava chip at 75% DM with urea at 4% in concentrate and sodium dl-malate at 20 g/hd/d with UTS as a roughage could improv rumen ecology and microbial protein synthesis efficiency in lactating dairy cows.

Design of Dual-Mode Digital Down Converter for WCDMA and cdma2000

  • Kim, Mi-Yeon;Lee, Seung-Jun
    • ETRI Journal
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    • v.26 no.6
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    • pp.555-559
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    • 2004
  • We propose an efficient digital IF down converter architecture for dual-mode WCDMA/cdma2000 based on the concept of software defined radio. Multi-rate digital filters and fractional frequency conversion techniques are adopted to implement the front end of a dual-mode receiver for WCDMA and cdma2000. A sub-sampled digital IF stage was proposed to support both WCDMA and cdma2000 while lowering the sampling frequency. Use of a CIC filter and ISOP filter combined with proper arrangement of multi-rate filters and common filter blocks resulted in optimized hardware implementation of the front end block in 292k logic gates.

The Arrangement of Stocker for Optimization Number and Utilization (Stocker 수와 가동률의 최적화를 위한 Stocker 배치 방법)

  • 안종호
    • Proceedings of the Korea Society for Simulation Conference
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    • 1999.10a
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    • pp.30-34
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    • 1999
  • 반도체 산업의 시장은 매년 증가하고 있으며 생산환경, 설비 등의 변화로 인하여 매년 많은 수의 기존 FAB Line이 변화되고 새로이 건설되고 있다. 그 동안 반도체 산업의 성장은 주로 설계기술, 설비기술, Chip Size의 소형화 등의 기술적인 개발에 의존하고 있었으나 반도체 기술의 확산, 시장 경쟁력의 격화 등으로 생산성 향상에 의한 원가절감이 성장의 근본요인이 되고 있다. 즉 FAB Line의 시스템적인 관리통제의 기술이 반도체 산업의 성패를 좌우하는 시대로 접어든 것이다. FAB Line은 크게 Bay와 Stocker, 각 Lot (또는 Batch) 들을 운반하는 Inter-System으로 구성된다. 이러한 Line은 대체 특성, 분기 현상, 돌발 상황 등의 특수한 경우가 많아 Analytic 모델로 접근하기에는 사실상 불가능하다. 특히 Stocker와 Bay 간의 이동은 더욱 그렇다. 따라서 적절한 설계과정을 거친 Simulation적 접근이 합리적이다. 본 논문에서는 FAB Line에서 Stocker 배치의 다양한 실험을 수행하였다. 그 결과 Line에서 최적의 Stocker 수와 가동률을 알아내었다. 반도체 생산라인에서는 제품별 또는 같은 제품이라도 Version이 다른 경우 FAB 공정가운데 약 10% 내외만이 바뀌는 점을 감안하면 본 논문의 결과는 쉽게 생산현장에 적용될 수 있을 것이며, 이것은 비단 반도체 공정뿐 아니라 제조업에서도 적용되리라 예상한다.

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Via-size Dependance of Solder Bump Formation (비아 크기가 솔더범프 형성에 미치는 영향)

  • 김성진;주철원;박성수;백규하;이상균;송민규
    • Journal of the Microelectronics and Packaging Society
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    • v.8 no.1
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    • pp.33-38
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    • 2001
  • We investigate the via-size dependance of as-electroplated- and reflow-bump shapes for realizing both high-density and high-aspect ratio of solder bump. The solder bump is fabricated by subsequent processes as follows. After sputtering a TiW/Al electrode on a 5-inch Si-wafer, a thick photoresist for via formation it obtained by multiple-codling method and then vias with various diameters are defined by a conventional photolithography technique using a contact alinger with an I-line source. After via formation the under ball metallurgy (UBM) structure with Ti-adhesion and Cu-seed layers is sputtered on a sample. Cu-layer and Sn/pb-layer with a competition ratio of 6 to 4 are electroplated by a selective electroplating method. The reflow-bump diameters at bottom are unchanged, compared with as-electroplated diameters. As-electroplated- and reflow-bump shapes, however, depend significantly on the via size. The heights of as-electroplated and reflow bumps increase with the larger cia, while the aspect ratio of bump decreases. The nearest bumps may be touched by decreasing the bump pitch in order to obtain high-density bump. The touching between the nearest bumps occurs during the overplating procedure rather than the reflowing procedure because the mushroom diameter formed by overplating is larger than the reflow-bump diameter. The arrangement as zig-zag rows can be effective for realizing the flip-chip-interconnect bump with both high-density and high-aspect ratio.

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Implementation of Co-Channel Radio Relay System and Its Performance Evaluation with Synchronous Digital Hierarchy (동기식 디지틀 계위의 동일채널 무선 전송장치구현 및 성능분석)

  • 서경환
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.35D no.11
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    • pp.10-22
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    • 1998
  • In this paper, as a way of improving the availability and spectral efficiency of radio relay system, a co-channel radio relay system based upon the synchronous digital hierarchy is developed and its performance measured by 64-QAM with a never-seen multi-purpose ASIC chip is illustrated. This system provides a couple of transmission capacity compared with alternative channel arrangement. By adopting a powerful complex 13-tap adaptive time domain equalizer and cross-pol interference canceller, improvement of more than 1.5 ~ 2.0 dB in signature is obtained in comparison to 9 or 11-tap adaptive time domain equalizer, and about 22.5 dB in improvement factor of cross-pol interference canceller is achieved at C/N of 24.5 dB. In addition, digital filter makes it possible to optimize the occupied bandwidth by selecting an appropriate roll-off factor externally. It is expected that co-channel radio relay system with the powerful multi-purpose ASIC chip plays a key role in creating a value-added product, reliability, and reducing the outage time.

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