• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.3B
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• pp.584-591
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• 2000

In distributed arithmetic-based architecture for an inner product between two length-N vectors, the size of the ROM increases exponentially with N. Moreover, the ROMs are generally the bottleneck of speed, especially when their size is large. In this paper, a ROM size reduction technique for DA( distributed arithmetic ) is proposed. The proposed method is based on modified OBC( offset binary coding) and control circuit reduction technique. by simulations, it is shown that the use of the proposed technique can result in reduction in the number of gates up to 50%.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.2 no.1
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• pp.147-156
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• 1998

In this paper, an arithmetic processor using multi-valued logic is designed. For implementing of multi-valued logic circuits, we use current-mode CMOS circuits and design encoder which change binary voltage-mode signals to multi-valued current-mode signals and decoder which change results of arithmetic to binary voltage-mode signals. To reduce the number of partial product we use 4-radix SD number partial product generation algorithm that is an extension of the modified Booth's algorithm. We demonstrate the effectiveness of the proposed arithmetic circuits through SPICE simulation and Hardware emulation using FPGA chip.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.2
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• pp.856-859
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• 2005

This paper presents a method of constructing the highly efficiency arithmetic operation unit systems(AOUS) based on fields. The proposed AOUS is more regularity and extensibility than previous methods. Also, the proposed AOUS be able to apply basic multimedia hardware. The future research is demanded to more compact and advanced arithmetic operation algorithm.

• Proceedings of the KIEE Conference
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• 1999.07g
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• pp.2876-2878
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• 1999

There have been several tipical methods being used to measure the fuzziness (entropy) of fuzzy sets. Pedrycz is the original motivation of this paper. This paper studies the entropy variation on the fuzzy numbers with arithmetic operations(addition, subtraction, multiplication). It is shown that through the arithmetic operations, the entropy of the resultant fuzzy number has the arithmetic relation with the entropy of each original fuzzy number. This paper generalize earlier results of Pedrycz [FSS 64(1994) 21-30] and Wang and Chiu [FSS 103(1999) 443-455].

• Industrial Engineering and Management Systems
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• v.2 no.1
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• pp.63-70
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• 2003

In this study, we employed an arithmetic process (AP) approach to resolve gearbox maintenance problems. The approach is realistic and direct in modelling the characteristics of a deteriorating system such as a gearbox since a decreasing AP can model a gearbox's successive operating times and an increasing AP can model the corresponding consecutive repair times. First of all, two test statistics were used to check whether the process is arithmetic or not. Next, model parameters of the AP were estimated using the simple linear regression method. Finally, the optimal replacement policy based on minimising the long-run average cost per day was determined for each type of gearbox.

• Journal of Korea Multimedia Society
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• v.11 no.6
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• pp.816-827
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• 2008

In this paper, two-stage pipelined floating-point arithmetic unit (FP-AU) is designed. The FP-AU processor supports seventeen operations to apply 3D graphics processor and has area-efficient and low-latency architecture that makes use of modified dual-path computation scheme, new normalization circuit, and modified compound adder based on flagged prefix adder. The FP-AU has about 4-ns delay time at logic synthesis condition using $0.18{\mu}m$ CMOS standard cell library and consists of about 5,930 gates. Because it has 250 MFLOPS execution rate and supports saturated arithmetic including a number of graphics-oriented operations, it is applicable to mobile 3D graphics accelerator efficiently.

• Journal of Multimedia Information System
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• v.5 no.4
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• pp.273-276
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• 2018

In video compression standards, the entropy coding is essential to the high performance compression because redundancy of data symbols is removed. Binary arithmetic coding is one of high performance entropy coding methods. However, the dependency between consecutive binary symbols prevents improving the throughput. For the throughput enhancement, a new probability model is proposed for encoding multi-symbols at one time. In the proposed method, multi-symbol encoder is implemented with only adders and shifters, and the multiplication table for interval subdivision of binary arithmetic coding is removed. Compared to the compression ratio of CABAC of H.264/AVC, the performance degradation on average is only 1.4% which is negligible.

• East Asian mathematical journal
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• v.35 no.1
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• pp.59-66
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• 2019

In this paper we study implicit-explicit (IMEX) methods combined with a semi-Lagrangian scheme to evaluate the prices of fixed strike arithmetic Asian options under jump-diffusion models. An Asian option is described by a two-dimensional partial integro-differential equation (PIDE) that has no diffusion term in the arithmetic average direction. The IMEX methods with the semi-Lagrangian scheme to solve the PIDE are discretized along characteristic curves and performed without any fixed point iteration techniques at each time step. We implement numerical simulations for the prices of a European fixed strike arithmetic Asian put option under the Merton model to demonstrate the second-order convergence rate.

• East Asian mathematical journal
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• v.40 no.1
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• pp.75-83
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• 2024

For a reduced, irreducible and nondegenerate curve C ⊂ ℙ^r of degree d, it was shown that the arithmetic genus g of C has an upper bound π₀(d, r) by G. Castelnuovo. And he also classified the curves that attain the extremal value. These curves are arithmetically Cohen-Macaulay and contained in a surface of minimal degree. In this paper, we investigate the arithmetic genus of curves lie on a surface of minimal degree - the Veronese surface, smooth rational normal surface scrolls and singular rational normal surface scrolls. We also provide a construction of curves on singular rational normal surface scroll S(0, 2) ⊂ ℙ³ which attain the maximal arithmetic genus.

• Journal of Applied and Pure Mathematics
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• v.6 no.3_4
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• pp.105-117
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• 2024

In the classical sense, it is known that it is impossible to construct a vector space over the entire set of real numbers with the help of simple interval arithmetic. In this article, it has shown that a vector space can be constructed in the classical sense by helping Markov's extended interval arithmetic on the interval valued Cesaro sequence spaces of non-absolute type. As a result of the positive answers, this idea was extended by us with some theorems. Consequently, a new perspective was gained to the construction of new types of sequence spaces by using different algebraic operations on interval-valued sequence spaces.