• IEIE Transactions on Smart Processing and Computing
• /
• v.5 no.4
• /
• pp.289-293
• /
• 2016

As more mobile devices are equipped with multi-core CPUs and are required to execute many compute-intensive multimedia applications, it is important to optimize the systems, considering the underlying parallel hardware architecture. In this paper, we implement and optimize ray-tracing application tailored to a given mobile computing platform with multiple heterogeneous processing elements. In this paper, a lightweight ray-tracing application is specified and implemented in Kahn process network (KPN) model-of-computation, which is known to be suitable for the description of real-time applications. We take an open-source C/C++ implementation of ray-tracing and adapt it to KPN description in the Distributed Application Layer framework. Then, several possible configurations are evaluated in the target mobile computing platform (Exynos 5422), where eight heterogeneous ARM cores are integrated. We derive the optimal degree of parallelism and a suitable distribution of the replicated tasks tailored to the target architecture.

• Proceedings of the KIEE Conference
• /
• 2007.04a
• /
• pp.442-444
• /
• 2007

This paper presents an architecture of UPnP Bridge that allows controlling Non-iP devices from UPnP control point, without modification to Non-IP device or UPnP control point implementations. UPnP devices must provide SSDP discovery, SOAP control and GENA event processes. To represent Non-IP devices to UPnP devices, UPnP Bridge provides these functionalities on behalf of Non-IP devices. We provides two method to interoperability between UPnP and Non-IP devices, Message Field Description, Non-UPnP Proxy devices. And solution to integrate heterogeneous networking standards(RS232C, CAN, IEEE1394, USB) is provided.

• Journal of Construction Engineering and Project Management
• /
• v.3 no.1
• /
• pp.14-21
• /
• 2013

To analyze building energy consumption, the building description for building energy performance analysis (BEPA) is required. The required data input for subject building is a basic step in the BEPA process. Since building information modeling (BIM) is applied in the construction industry, the required data for BEPA can be gathered from a single international standard file format like IFCXML. However, in most BEPA processes, since the required data cannot be fully used from the IFCXML file, a building description for BEPA must be created again. This paper proposes IFCXML-based automatic data input approach for BEA. After the required data for BEPA has been defined, automatic data input for BEPA is developed by a prototype system. To evaluate the proposed system, a common BIM file from the BuildingSMART website is applied as a sample model. This system can increase the efficiency and reliability of the BEPA process, since the data input is automatically and efficiently improved by directly using the IFCXML file..

• Journal of Korean Institute of Industrial Engineers
• /
• v.25 no.2
• /
• pp.150-161
• /
• 1999

This paper deals with the design and development of a real-time integrated communication architecture for heterarchical SFCS(Shop Floor Control System). In autonomous agent-based heterarchical SFCS, each functional unit of parts and resources is equipped with an intelligent controller (agent) that acts as the representative of the entity. The controllers communicate and negotiate with other controllers on a real-time basis through message passing and bidding protocol to achieve mutual agreements for task sharing. ICPL(Integrated Communication Protocol and Language) is proposed for this purpose. ICPL is a language and a protocol for supporting communication among intelligent controllers. Based on the speech act theory, this paper proposes a semantic description for ICPL that associates the description of the cognitive states of controllers with the use of language primitives (message_type). Semantics for the basic set of ICPL messages is described. Eventually, an ICPL-based communication architecture can provide the implementation of the distributed and heterarchical SFCS, and makes the intelligent controller transparent to the negotiation problem.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.24 no.3
• /
• pp.425-432
• /
• 1987

The microprogram is the key technology of the implementation of the processor's control unit. But the coding and testing it is the most tedious process in the developing a new computer system. We developed the conversational micro architecture simulator(C-MAS) in order to use it as a microprogram development tool and a run time analyzer of the microprogram. We discuss the hardware description language(HDL) for a smulation, the design constraints of the C-MAS, and the user interface of it in this paper. We used the C language as the description language, and developed it on the berkeley UNIX4.2.

• International conference on construction engineering and project management
• /
• 2013.01a
• /
• pp.173-180
• /
• 2013

To analyze building energy consumption, the building description for building energy performance analysis (BEPA) is required. The required data input for subject building is a basic step in the BEPA process. Since building information modeling (BIM) is applied in the construction industry, the required data for BEPA can be gathered from a single international standard file format like IFCXML. However, in most BEPA processes, since the required data cannot be fully used from the IFCXML file, a building description for BEPA must be created again. This paper proposes IFCXML-based automatic data input approach for BEA. After the required data for BEPA has been defined, automatic data input for BEPA is developed by a prototype system. To evaluate the proposed system, a common BIM file from the BuildingSMART website is applied as a sample model. This system can increase the efficiency and reliability of the BEPA process, since the data input is automatically and efficiently improved by directly using the IFCXML file.

• Journal of KIISE:Software and Applications
• /
• v.36 no.9
• /
• pp.758-766
• /
• 2009

In this days, the concept of time-to-market is important in embedded systems in consumer electronics. According to the short time of development period, it is also important in development of Software Development toolkits (SDKs). However, it is not improved to the development time of SDKs specialized in new processors. In this point, the Architecture Description Language (ADL) is an alternative to relieve the pain of building the SDKs as the required SDKs can be automatically generated from ADL for the processor. In this paper, we automatically generate SDKs specialized in processors using GNU Binutils. Through this research, we can more easier and faster produce the SDKs such as assembler and linker than by using handcrafted code.

• Journal of Korea Multimedia Society
• /
• v.13 no.7
• /
• pp.1076-1087
• /
• 2010

Together with a new advent of embedded processor developed to support specific application area and it evolution, a new research of software development to support the embedded processor and its commercial challenge has been revitalized. Retargetability is typically achieved by providing target machine information, ADL, as input. The ADLs are used to specify processor and memory architectures and generate software toolkit including compiler, simulator, assembler, profiler, and debugger. The EXPRESSION ADL follows a mixed level approach-it can capture both the structure and behavior supporting a natural specification of the programmable architectures consisting of processor cores, coprocessors, and memories. And it was originally designed to capture processor/memory architectures and generate software toolkit to enable compiler-in-the-loop exploration of SoC architecture. In this paper, we designed the class-based ADL based on the EXPRESSION ADL to promote the write-ability, extensibility and verified the validation of grammar. For this works, we defined 6 core classes and generated the EXPRESSION's compiler and simulator through the MIPS R4000 description.

• Journal of architectural history
• /
• v.24 no.1
• /
• pp.51-60
• /
• 2015

This study aims to examine the brief statement about the historiography of architecture by the French philosopher Michel Foucault and the possibility of a historical description according to his method. His historiographic proposition, "the history of architecture back in (the) general history of techne," is a novel idea not only for his contemporaries but also for us. To grasp the meaning of Foucault's proposition, we begin by considering his position with regard to architecture or architectural space in certain discussions till then. We then compare his standpoint on historical recognition with other viewpoints about historical narratives that can be found in books written since 1930. Finally, we interpret the concept of "techne" in the sense of "relation," whose objectivation is for him his concern on architecture and examine possible aspects and their limits.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.32 no.12B
• /
• pp.779-789
• /
• 2007

This paper presents an architecture of UPnP Bridge for interconnecting Non-lP devices with heterogeneous network interfaces to UPnP devices on UPnP networks. The proposed UPnP Bridge provides a Virtual UPnP device that performs generic UPnP Device's functionalities on behalf of Non-lP device. This paper defines 3 types of descriptions, Device Description, Message Field Description, and Extended UPnP Service Description in order to reduce the amount of effort required to connect a non-lP device with a new interface or message format to UPnP network. By these three types of descriptions and Message conversion module, developers for Non-lP devices can easily connect the devices to UPnP network without additional programming. So UPnP control point controls Non-lP devices as generic UPnP device. Some experiments validate the proposed architecture, which are performed on a test bed consisting of UPnP network the proposed bridge, and non-lP devices with CAN and RS232 interfaces.