• Title/Summary/Keyword: Annealing process

Search Result 1,589, Processing Time 0.027 seconds

Suppression of Macrostep Formation Using Damage Relaxation Process in Implanted SiC Wafer (SiC 웨이퍼의 이온 주입 손상 회복을 통한 Macrostep 형성 억제)

  • Song, G.H.;Kim, N.K.;Bahng, W.;Kim, S.C.;Seo, K.S.;Kim, E.D.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2002.07a
    • /
    • pp.346-349
    • /
    • 2002
  • High Power and high dose ion implantation is essentially needed to make power MOSFET devices based on SiC wafers, because the diffusivities of the impurities such as Al, N, p, B in SiC crystal are very low. In addition, it is needed high temperature annealing for electrical activation of the implanted species. Due to the very high annealing temperature, the surface morphology after electrical activation annealing becomes very rough. We have found the different surface morphologies between implanted and unimplanted region. The unimplanted region showed smoother surface morphology It implies that the damage induced by high energy ion implantation affects the roughening mechanism. Some parts of Si-C bonding are broken in the damaged layer, s\ulcorner the surface migration and sublimation become easy. Therefore the macrostep formation will be promoted. N-type 4H-SiC wafers, which were Al ion implanted at acceleration energy ranged from 30kev to 360kev, were activated at 1600$^{\circ}C$ for 30min. The pre-activation annealing for damage relaxation was performed at 1100-1500$^{\circ}C$ for 30min. The surface morphologies of pre-activation annealed and activation annealed were characterized by atomic force microscopy(AFM).

  • PDF

진공석영 전기로에서 열처리한 $CuInS_2$ 박막특성연구

  • Yang, Hyeon-Hun;Lee, Seok-Ho;Kim, Yeong-Jun;Na, Gil-Ju;Baek, Su-Ung;Han, Chang-Jun;Kim, Han-Ul;So, Sun-Yeol;Park, Gye-Chun;Lee, Jin;Jeong, Hae-Deok
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2010.03b
    • /
    • pp.17-17
    • /
    • 2010
  • Polycrystalline $CuInS_2$ thin films were performed from S/In/Cu Stacked elemental layer(SEL) method with post annealing. In thin method, the thin films were annealed in Vacuum of $10^{-3}$ torr or in S ambient. $CuInS_2$ thin films were manufctured by using the evaporation and the annealing with vacuum quartz furnace of sulfurization process was used in the vacuum chamber to the substrate temperature on the glass substrate the annealing temperature and characteristics thereof were investigated. The physical properties of the thin film were investigated under various fabrication conditions including the substrate temperature annealing time by XRD, FE-SEM, and Hall measurement system.

  • PDF

A study on the design of boron diffusion simulator applicable for shallow $p^+-n$ junction formation (박막 $p^+-n$ 접합 형성을 위한 보론 확산 시뮬레이터의 제작에 관한 연구)

  • Kim, Jae-Young;Kim, Bo-Ra;Hong, Shin-Nam
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2004.04b
    • /
    • pp.30-33
    • /
    • 2004
  • Shallow p+-n junctions were formed by low-energy ion implantation and dual-step annealing processes The dopant implantation was performed into the crystalline substrates using $BF_2$ ions. The annealing was performed with a rapid thermal processor and a furnace. FA+RTA annealing sequence exhibited better junction characteristics than RTA+FA thermal cycle from the viewpoint of junction depth. A new simulator is designed to model boron diffusion in silicon, which is especially useful for analyzing the annealing process subsequent to ion implantation. The model which is used in this simulator takes into account nonequilibrium diffusion, reactions of point defects, and defect-dopant pairs considering their charge states, and the dopant inactivation by introducing a boron clustering reaction. Using a resonable parameter values, the simulator covers not only the equilibrium diffusion conditions but also the nonequilibrium post-implantation diffusion. Using initial conditions and boundary conditions, coupled diffusion equation is solved successfully. The simulator reproduced experimental data successfully.

  • PDF

Property Changes of Europium-Silicate Thin Films depending on the Ambient Gas (열처리 분위기에 따른 유로퓸 실리케이트 박막의 특성 변화)

  • Kim, Eun-Hong;Shin, Young-Chul;Leem, Si-Jong;Hahn, Cheol-Koo;Kim, Tae-Geun
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.20 no.3
    • /
    • pp.263-267
    • /
    • 2007
  • We investigate the influence of the ambient gas during thermal annealing on the photoluminescence (PL) properties of europium-silicate thin films. The films were fabricated on substrates by using a radio-frequency magnetron sputtering method and subsequent rapid thermal annealing (RTA). The mechanism for the formation of the europium silicates during the annealing process was investigated by using X-ray diffraction (XRD) spectroscopy, Auger electron spectroscopy (AES) and transmission electron microscopy (TEM). A series of narrow PL spectra from $Eu^{3+}$ ions was observed from the film annealed in $O_2$ ambient. Broad PL spectra associated with $Eu^{2+}$ ions, with a maximum intensity at 600 nm and a FWHM of 110 nm, were observed from the thin film annealed at $1000^{\circ}C$ in $N_2$ ambient.

Annealing Effects on Concentration Profiles of Deep Energy Levels in Platinum-diffused Silicon (백금 확산 실리콘의 깊은 에너지 준위의 농도분포에 대한 열처리효과)

  • Kwon, Young-Kyu
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.20 no.3
    • /
    • pp.207-212
    • /
    • 2007
  • The concentration profiles of deep energy levels($E_c$ -0.23e V, $E_v$+0.36e V and $E_c$ -0.23e V) in platinum-diffused silicon have generally a sharp gradient in the vicinity of the surface of the silicon wafer. In this work two efficient methods are proposed to obtain the uniform concentration profiles throughout the silicon wafer. One is that the platinum diffusion is carried out at $1000^{\circ}C$ for 1h in oxygen atmosphere. In this case the values of obtained uniform concentration, $1{\times}10^{15}cm^{-3}$ for the $E_c$ -0.23e V level, and 1{\times}10^{14}cm^{-3}$ for the $E_c$ -0.52e V level, are very restricted, respectively. The other is two-step annealing process. The platinum diffusion is carried out at $850{\sim}1100^{\circ}C$ in a nitrogen ambient for 1h and then the annealing is performed at $1000^{\circ}C$ in oxygen ambient after removing platinum-source from the platinum diffused samples. The advantage of this method is that the uniform concentration of these levels required power devices can be controlled by setting the desired temperatures when the platinum diffusion is carried out in nitrogen ambient.

Effect of Annealing Temperature on the Nodular Corrosion of Zircaloy-4 Alloy (Zircaloy-4 합금의 Nodule형 부식에 미치는 열처리 온도의 영향)

  • 정용환;최종술;임갑순
    • Journal of Surface Science and Engineering
    • /
    • v.24 no.1
    • /
    • pp.31-41
    • /
    • 1991
  • The nodular corrosion behavior of Zircaloy-4 alloy was investigated by autoclave test at 50$0^{\circ}C$ under 1500 psi for the specimens quenched into water from $700^{\circ}C$, 80$0^{\circ}C$, 90$0^{\circ}C$, and 105$0^{\circ}C$. It was observed that the corrosion resistance of Zircalloy-4 specimen increased with increase in annealing temperature, and annealing at $\alpha$-region temperatures resulted in nodular corrosion while annealing at the temperature range of $\alpha$+$\beta$ and $\beta$ did not show nodular corrosion. It was also found that the size of nodule formed on the surface of the specimens increased with increase in exposure time in autoclave, but the total number of nodule remained uncha-nged. The corrosion of furnace-cooled specimens progressed mostly in the interior of grains where Fe and Cr alloying elements were largely depleted during the cooling process. However, the grain boundary seemed to act as a barrier to the nodular corrosion. From combining the present results with other works, it is suggested that the nodules nuc-leate in the local region where some of alloying elements are depleted.

  • PDF

Size Tunable Nano Patterns Using Nanosphere Lithography with Ashing and Annealing Effect (나노 구체 리소그라피법에 Ashing과 Annealing 효과를 적용하여 크기조절 가능한 나노패턴의 제조)

  • Lee, Yu-Rim;Alam, Mahbub;Kim, Jin-Yeol;Jung, Woo-Gwang;Kim, Sung-Dai
    • Korean Journal of Materials Research
    • /
    • v.20 no.10
    • /
    • pp.550-554
    • /
    • 2010
  • This work presents a fabrication procedure to make large-area, size-tunable, periodically different shape metal arrays using nanosphere lithography (NSL) combined with ashing and annealing. A polystyrene (PS, 580 ${\mu}m$) monolayer, which was used as a mask, was obtained with a mixed solution of PS in methanol by multi-step spin coating. The mask morphology was changed by oxygen RIE (Reactive Ion Etching) ashing and temperature processing by microwave heating. The Au or Pt deposition resulted in size tunable nano patterns with different morphologies such as hole and dots. These processes allow outstanding control of the size and morphology of the particles. Various sizes of hole patterns were obtained by reducing the size of the PS sphere through the ashing process, and by increasing the size of the PS sphere through annealing treatment, which resulted in tcontrolling the size of the metallic nanoparticles from 30 nm to 230 nm.

Enhanced Electrochromic Performance by Uniform Surface Morphology of Tungsten Oxide Films (텅스텐산화물 막의 균일한 표면 형상에 의한 향상된 전기변색 성능)

  • Kim, Kue-Ho;Koo, Bon-Ryul;Ahn, Hyo-Jin
    • Korean Journal of Materials Research
    • /
    • v.28 no.7
    • /
    • pp.411-416
    • /
    • 2018
  • Tungsten oxide($WO_3$) films with uniform surface morphology are fabricated using a spin-coating method for applications of electrochromic(EC) devices. To improve the EC performances of the $WO_3$ films, we control the heating rate of the annealing process to 10, 5, and $1^{\circ}C/min$. Compared to the other samples, the $WO_3$ films fabricated at a heating rate of $5^{\circ}C/min$ shows superior EC performances for transmittance modulation(49.5 %), response speeds(8.3 s in a colored state and 11.2 s in a bleached state), and coloration efficiency($37.3cm^2/C$). This performance improvement is mainly related to formation of a uniform surface morphology with increased particle size without any cracks by an optimized annealing heating rate, which improves the electrical conductivity and electrochemical activity of the $WO_3$ films. Thus, the $WO_3$ films with a uniform surface morphology prepared by the optimized annealing heating rate can be used as a potential candidate for performance improvement of the EC devices.

A Study on Cu(B)/Ti/SiO2/Si Structure for Application to Advanced Manufacturing Process (차세대 공정에 적용 가능한 Cu(B)/Ti/SiO2/Si 구조 연구)

  • Lee Seob;Lee Jaegab
    • Korean Journal of Materials Research
    • /
    • v.14 no.4
    • /
    • pp.246-250
    • /
    • 2004
  • We have investigated the effects of boron added to Cu film on the Cu-Ti reaction and microstructural evolution of Cu(B) alloy film during annealing of Cu(B)/Ti/$SiO_2$/Si structure. The result were compared with those of Cu(B)/$SiO_2$ structure to identify the effects of Ti glue layers on the Boron behavior and the result grain growth of Cu(B) alloy. The vacuum annealing of Cu(B)/Ti/$SiO_2$ multilayer structure allowed the diffusion of B to the Ti surface and forming $TiB_2$ compounds at the interface. The formed $TiB_2$ can act as a excellent diffusion barrier against Cu-Ti interdiffusion up to $800^{\circ}C$. Also, the resistivity was decreased to $2.3\mu$$\Omega$-cm after annealing at $800^{\circ}C$. In addition, the presence of Ti underlayer promoted the growth Cu(l11)-oriented grains and allowed for normal growth of Cu(B) film. This is in contrast with abnormal growth of randomly oriented Cu grains occurring in Cu(B)/$SiO_2$ upon annealing. The Cu(B)/Ti/$SiO_2$ structure can be implemented as an advanced metallization because it exhibits the low resistivity, high thermal stability and excellent diffusion barrier property.

Structural, Optical and Electrical Properties of GZO Thin Film for Annealing Temperature Change by RF Magnetron Sputtering System (RF magnetron sputtering으로 증착한 GZO 박막의 열 처리 온도 변화에 따른 구조적, 광학적, 전기적 특성)

  • Lee, Yun seung;Kim, Hong bae
    • Journal of the Semiconductor & Display Technology
    • /
    • v.15 no.4
    • /
    • pp.41-45
    • /
    • 2016
  • ITO/GZO double layered thin films were prepared on transparent glass substrates. Ga-doped ZnO(GZO) films were deposited by RF magnetron sputtering using an ZnO:Ga (98: 2 wt%) target. The post deposition annealing process was conducted for 30 minutes at different temperature of 100, 200, 300 and $400^{\circ}C$, respectively. As increase annealing temperature, ITO/GZO double layered thin films show the increment of the prefer orientation of ZnO diffraction peak (002) in the XRD patterns. We obtained Ga-doped ZnO thin films with a lowest resistivity of $1.84{\times}10^{-4}{\Omega}-cm$ at $400^{\circ}C$ and transparency above 80% in visible ranges. The figure of merit obtained in this study means that ITO/GZO double layered thin films which annealed at $400^{\circ}C$ have the highest optoelectrical performance in this study.