• 마이크로전자및패키징학회지
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• 제6권3호
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• pp.65-71
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• 1999

광 패키징에서 광섬유와 광전자소자를 정확히 정렬하기 위한 V-groove의 치수 정밀도에 미치는 마스크 재료와 에칭용액의 영향을 연구하였다. PECVD nitride, LPCVD nitride, thermal oxide($SiO_2$)를 마스크재료로 사용하였고 실리콘을 이방성에칭하는 용액으로 KOH(40wt%)용액과 KOH(40wt%)용액에 IPA를 첨가한 용액을 이용하였다. 마스크재료로는 LPCVD nitride가 가장 좋은 선택적에칭특성을 나타내었으며 사용된 마스크재료 중 thermal oxide가 가장 빠른 속도로 에칭되었다. V-groove의 크기 증가는 마스크충 아래로의 undercutting에 의해 생겼는데 이는 주로 (111)면으로의 에칭 때문이었다. KOH(40wt%)용액에서 (111)면의 에칭속도는 0.034 - 0.037 $\mu\textrm{m}$/min로 마스크재료에 관계없이 거의 일정하였다. IPA를 KOH(40wt%)용액에 첨가하면 (100)면과 (111)면의 에칭속도는 모두 감소하지만 (111)면에 대한 (100)면의 에칭속도비는 증가하였다. 그러므로 이런 용액에서 (111)면으로의 에칭에 의한 undercutting현상은 줄어들었으며 V-groove의 크기를 더 정확하게 조절할 수 있었다.

• 한국표면공학회지
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• 제50권5호
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• pp.315-321
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• 2017

Antireflective pyramid arrays can be readily obtained via anisotropic etching in alkaline solution (KOH, NaOH), which is widely used in crystalline-Si (c-Si) solar cells. The periodic inverted pyramid arrays show even lower light reflectivity because of their superior light-trapping characteristics. Since this inverted pyramidal structures are mostly achieved using very complex techniques such as photolithograpy and laser processes requiring extra costs, here, we demonstrate the Cu-nanoparticle assisted chemical etching processes to make the inverted pyramidal arrays without the need of photolithography. We have mainly controlled the concentration of $Cu(NO_3)_2$, HF, $H_2O_2$ and temperature as well as time factors that affecting the reaction. Optimal inverted pyramid structure was obtained through reaction parameters control. The reflectance of inverted pyramid arrays showed < 10% over 400 to 1100 nm wavelength range while showing 15~20% in random pyramid arrays.

• 정보저장시스템학회논문집
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• 제1권2호
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• pp.182-187
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• 2005

A large area micro mirror is an optical element that functions as changing an optical path by reflection in integrated optical system. We fabricated the large area silicon mirror by anisotropic etching using MEMS for implementation of integrated optical pickup. In this work, we report the optimum conditions to better fabricate and design, greatly improve mirror surface quality. To obtain mirror surface of $45^{\circ},\;9.74^{\circ}$ off-axis silicon wafer from (100) plane was used in etching condition of $80^{\circ}C$ with 40wt.% KOH solution. After wet etching, polishing process by MR fluid was applied to mirror surface for reduction of roughness. In the next step, after polymer coating on the polished Si wafer, the Si mirror was fabricated by UV curing using a trapezoid bar-type way structure. Finally, we obtained peak to valley roughness about 50 nm in large area of $mm^2$ and it is applicable to optical pickup using blu-ray wavelength as well as infrared wavelength.

• 한국세라믹학회지
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• 제35권8호
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• pp.813-818
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• 1998

A simple method to measure the elastic modulus E and Poisson's ratio v of diamod-like carbon (DLC) films deposited on Si wafer was suggested. Using the anisotropic etching technique of Si we could make the edge of DLC overhang free from constraint of Si substrate. DLC film is chemically so inert that we could not on-serve any surface damage after the etching process. The edge of DLC overhang free from constraint of Si substrate exhibited periodic sinusoidal shape. By measuring the amplitude and the wavelength of the sinu-soidal edge we could determine the stain of the film required to adhere to the substrate. Since the residual stress of film can be determine independently by measurement of the curvature of film-substrate com-posite we could calculated the biaxial elastic modulus E/(1-v) using stress-strain relation of thin films. By comparing the biaxial elastic modulus with the plane-strain modulus E/(1-{{{{ { v}^{2 } }}) measured by nano-in-dentation we could further determine the elastic modulus and Poisson's ratio independently. This method was employed to measure the mechanical properties of DLC films deposited by {{{{ { {C }_{6 }H }_{6 } }} rf glow discharge. The was elastic modulus E increased from 94 to 169 GPa as the {{{{ { V}_{ b} / SQRT { P} }} increased from 127 to 221 V/{{{{ {mTorr }^{1/2 } }} Poisson's ratio was estimated to be abou 0.16∼0.22 in this {{{{ { V}_{ b} / SQRT { P} }} range. For the {{{{ { V}_{ b} / SQRT { P} }} less than 127V/{{{{ {mTorr }^{1/2 } }} where the plastic deformation can occur by the substrate etching process however the present method could not be applied.

• 한국재료학회지
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• 제23권2호
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• pp.116-122
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• 2013

For fabricating silicon solar cells with high conversion efficiency, texturing is one of the most effective techniques to increase short circuit current by enhancing light trapping. In this study, four different types of textures, large V-groove, large U-groove, small V-groove, and small U-groove, were prepared by a wet etching process. Silicon substrates with V-grooves were fabricated by an anisotropic etching process using a KOH solution mixed with isopropyl alcohol (IPA), and the size of the V-grooves was controlled by varying the concentration of IPA. The isotropic etching process following anisotropic etching resulted in U-grooves and the isotropic etching time was determined to obtain U-grooves with an opening angle of approximately $60^{\circ}$. The results indicated that U-grooves had a larger diffuse reflectance than V-grooves and the reflectances of small grooves was slightly higher than those of large grooves depending on the size of the grooves. Then amorphous Si:H thin film solar cells were fabricated on textured substrates to investigate the light trapping effect of textures with different shapes and sizes. Among the textures fabricated in this work, the solar cells on the substrate with small U-grooves had the largest short circuit current, 19.20 mA/$cm^2$. External quantum efficiency data also demonstrated that the small, U-shape textures are more effective for light trapping than large, V-shape textures.

• Journal of Korean Vacuum Science & Technology
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• 제3권1호
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• pp.24-29
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• 1999

The characteristic behaviors of CH3Br were examined first for the dry etching of polysilicon in a Cl2/CH3Br/O2 plasma. CH3Br is revealed one of the excellent additive gases to control anisotropy of etching profile and to give no undercutting for various typed of polysilicons. CH3Br acts as a passivation precursor on the side wall in etch cavity by forming polymer-like films such as CHxBry(x+y=1,2). The decrease of etch selectivity due to the reaction if the C-containing species from CH3Br with the surface O atoms of SiO2 was overcome by the addition of O2 into plasma, resulting that the selectivity increased by 2~3 times. According to the results of optical emission signals, CH3Br should be dissociated into several fragments to give more hydrogen atoms than bromine atoms in our helical resonator system.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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• pp.418-418
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• 2008

The electrochemical etching of silicon in HF-based solutions is known to form various types of porous structures. Porous structures are generally classified into three categories according to pore sizes: micropore (below 2 nm in size), mesopore (2 ~ 50 nm), and macropore (above 50 nm). Recently, the formation of macropores has attracted increasing interest because of their promising characteristics for an wide scope of applications such as microelectromechanical systems (MEMS), chemical sensors, biotechnology, photonic crystals, and photovoltaic application. One of the promising applications of macropores is in the field of MEMS. Anisotropic etching is essential step for fabrication of MEMS. Conventional wet etching has advantages such as low processing cost and high throughput, but it is unsuitable to fabricate high-aspect-ratio structures with vertical sidewalls due to its inherent etching characteristics along certain crystal orientations. Reactive ion dry etching is another technique of anisotropic etching. This has excellent ability to fabricate high-aspect-ratio structures with vertical sidewalls and high accuracy. However, its high processing cost is one of the bottlenecks for widely successful commercialization of MEMS. In contrast, by using electrochemical etching method together with pre-patterning by lithographic step, regular macropore arrays with very high-aspect-ratio up to 250 can be obtained. The formed macropores have very smooth surface and side, unlike deep reactive ion etching where surfaces are damaged and wavy. Especially, to make vertical microwire or nanowire arrays (aspect ratio = over 1:100) on silicon wafer with top-down photolithography, it is very difficult to fabricate them with conventional dry etching. The electrochemical etching is the most proper candidate to do it. The pillar structures are demonstrated for n-type silicon and the formation mechanism is well explained, while such a experimental results are few for p-type silicon. In this report, In order to understand the roles played by the kinds of etching solution and mask patterns in the formation of microwire arrays, we have undertaken a systematic study of the solvent effects in mixtures of HF, dimethyl sulfoxide (DMSO), iso-propanol, and mixtures of HF with water on the structure formation on monocrystalline p-type silicon with a resistivity with 10 ~ 20 $\Omega{\cdot}cm$. The different morphological results are presented according to mask patterns and etching solutions.

• 한국전기전자재료학회논문지
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• 제26권11호
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• pp.841-845
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• 2013

We give a textured front on silicon wafer for high-efficiency solar cells by using micro contact printing method which uses PDMS (polydimethylsiloxane) silicon rubber as a stamp and SAM (self assembled monolayer)s as an ink. A random pyramidal texturing have been widely used for a front-surface texturing in low cost manufacturing line although the cell with random pyramids on front surface shows relatively low efficiency than the cell with inverted pyramids patterned by normal optical lithography. In the past two decades, the micro contact printing has been intensively studied in nano technology field for high resolution patterns on silicon wafer. However, this promising printing technique has surprisingly never applied so far to silicon based solar cell industry despite their simplicity of process and attractive aspects in terms of cost competitiveness. We employ a MHA (16-mercaptohexadecanoic acid) as an ink for Au deposited $SiO_2/Si$ substrate. The $SiO_2$ pattern which is same as the pattern printed by SAM ink on Au surface and later acts as a hard resist for anisotropic silicon etching was made by HF solution, and then inverted pyramidal pattern is formed after anisotropic wet etching. We compare three textured surface with different morphology (random texture, random pyramids and inverted pyramids) and then different geometry of inverted pyramid arrays in terms of reflectivity.

• 한국결정학회지
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• 제14권2호
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• pp.93-104
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• 2003

The crystals of group-Ⅲ nitride semiconductors with wurtzite structure exhibit a strong polarity. Especially, GaN has characteristics of different growth rate, anisotropic electrical and optical properties due to the polarity. In this work, GaN epilayer was grown and the polarities of the crystals were observed by the chemical wet etching and SP-EFM. GaN thin films were deposited on c-plane A1₂O₃ substrate under the variations of growth conditions by HVPE such as the deposition temperature of the buffer layer, the deposition time, the ratio of Group-V and Ⅲ and the deposition temperature of the film. The adquate results were obtained under the conditions of 500℃, 90 seconds, 1333 and 1080℃, respectively. It is observed that the GaN layer grown without the buffer layer has N-polarity and the GaN layer grown on the buffer layer has Ga-polarity. Fine crystal single particles were grown on c-plane A1₂O₃ and SiO₂, layer. The external shape of the crystal shows ｛10-11｝｛10-10｝(000-1) planes as expected in the PBC theory and anisotropic behavior along c-axis is obvious. As a result of etching on each plane, (000-1) and ｛10-11｝planes were etched strongly due to the N-polarity and ｛10-10｝ plane was not affected due to the non-polarity. In the case of the crystal grown on c-plane A1₂O₃, two types of crystals were grown. They were hexagonal pyramidal-shape with ｛10-11｝plane and hexagonal prism with basal plane. The latter might be grown by twin plane reentrant edge (TPRE) growth.

• 센서학회지
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• 제15권1호
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• pp.1-6
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• 2006

We fabricated Si nano-wire MOSFET by using the conventional photolithography with a $1.5{\mu}m$ resolution. Si nano-wire was fabricated by using reactive ion etching (RIE), anisotropic wet etching and thermal oxidation on a silicon-on-insulator (SOI) substrate, and its width is 30 nm. Logarithmic circuit consisting of a NMOSFET and Si nano-wire MOSFET has been constructed for application to high-sensitivity image sensor. Its sensitivity was 1.12 mV/lux. The output voltage swing was 1.386 V.