• Title/Summary/Keyword: Analog switch

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The Study on the digital conversion present situation and consideration regarding an issue of analogue cable broadcast (아날로그 케이블 방송의 디지털 전환 현황과 쟁점에 관한 고찰)

  • Kim, Hee-Kyung;Kim, Dug-Mo
    • Journal of Digital Convergence
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    • v.11 no.6
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    • pp.1-9
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    • 2013
  • The digital signal is terminated on Dec.31, 2012. But most of the analog cable subscribers are faced with the difficult reception of the digital because the government has defined the terrestrial broadcast as digital transition obligation operators. It is estimated that half analog of the total pay-TV subscriber that is approximately 10million households that are directly receiving terrestrial signal must hold the digital TV or DtoA convertor to transit digital. But cable system subscriber should buy Set-top box that are expensive and pay the expensive rates. The cast of analog cable subscribers has been classified as a group that can cause the most damage after digital switch. This study investigate the problem, and cause, solution of the analog cable subscribers that are placed in the blind spots of the digital switch.

High Speed, High Resolution CMOS Sample and Hold Circuit (고속, 고해상도 CMOS 샘플 앤 홀드 회로)

  • Kim Won-Youn;Park Kong-Soon;Park Sang-Wook;Yoon Kwang-Sub
    • Proceedings of the IEEK Conference
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    • 2004.06b
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    • pp.545-548
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    • 2004
  • The paper describes the design of high-speed, high-resolution Sample-and-Hold circuit which shows the conversion rate 80MHz and the power supply of 3.3v with 0.35um CMOS 2-poly 4-metal process for high-speed, high resolution Analog-to-Digital Converter. For improving Dynamic performance of Sample-and-Hold, Two Double bootstrap switch and high performance operational amplifier with gain booster, which are used. and For physical stability of Sample and Hold circuit, reduces excess voltage of gate in bootstrap switch. Simulation results using HSPICE shows the SFDR of 71dB, 75dB in conversion rate of 80MHz result for two inputs(0.5Vpp, 10MHz and 1Vpp, 10MHz) and the power dissipation of 48mW at single 3.3V supply voltage.

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Analysis of analog MPPT Algorithms for Low cost Photovoltaic System (저가형 태양광 발전시스템을 위한 아날로그 MPPT 알고리즘의 특성 해석)

  • Kim Han-Goo;Lee Sang-Yong;Choi Moon-Gyu;Kim Hong-Sung;Choe Gyu-Ha
    • Proceedings of the KIPE Conference
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    • 2004.07a
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    • pp.121-124
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    • 2004
  • In this paper, Simple and inexpensive analog maximum power point tracker (MPPT) algorithm for photovoltaic power system and low power system of doesn't use digital signal processor (DSP). The control circuit is composed such that the actual current and voltage are sensed directly from the PV array. These two signals are then multiplied by a single-chip multiplier. The multiplier output go through different time constants genesis pulse width modulated to switch. Finally those were verified through simulation.

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Digital Firing Control for Thyristor Converter (사이리스터 디지털 점호제어)

  • Kim Jang-Mok
    • The Transactions of the Korean Institute of Power Electronics
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    • v.9 no.6
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    • pp.584-591
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    • 2004
  • The conventional analog-based firing circuit can be implemented by comparing a linearly decreasing periodic sawtooth waveform synchronized to the ac supply, with a control signal corresponding to the desired converter delay angle. This circuit requires a large number of passive components (resistance and capacitor) and careful adjustment of the synchronization circuity. In this paper a novel firing circuit is proposed for thyristor switch. The proposed circuit is implemented by using digital components(FPGA, A/D, and DSP etc.) on the basis of the analog cosine method.

Digital firing control for high power thyristor converter (대용량 전력변환용 사이리스터 디지털 점호제어)

  • Lee Y.B.;Kim J.M.;Lim I.H.;Ryu H.S.;Song S.H.
    • Proceedings of the KIPE Conference
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    • 2003.07b
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    • pp.565-568
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    • 2003
  • The conventional analog-based firing circuit can be implemented by comparing a linearly decreasing periodic sawtooth waveform synchronized to the ac line, with a voltage corresponding to the desired converter delay angle. This circuit requires a large number of components (resistance and capacitor) and careful adjustment of the synchronization circuity In this paper a novel firing circuit is proposed for thyristor switch is elements. The proposed circuit is implemented on the basis of the analog cosine method using FPGA and microprocessor.

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A High-speed Max/Min circuit

  • Riewruja, V.;ChimpaLee, T.;Chaikla, A.;Supaph, S.
    • 제어로봇시스템학회:학술대회논문집
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    • 2000.10a
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    • pp.513-513
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    • 2000
  • An integrable circuit technique for implementing high-speed analog two-input Max/Min circuit is described. The realization method is suitable for fabrication using CMOS technology. The proposed circuit comprises a current mirror and electronic switch connected with a absolute value circuit. The maximum or minimum operation of the proposed circuit can be selected by an external control voltage. The proposed analog Max/Min circuit has a very sharp transfer characteristic and is suitable for real-time systems. Simulation results verified the circuit performances are agreed with the expected values.

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Development of RSFQ Logic Circuits and Delay Time Considerations in Circuit Design (RSFQ 논리회로의 개발과 회로설계에 대한 지연시간 고려)

  • Kang, J.H.;Kim, J.Y.
    • Progress in Superconductivity
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    • v.9 no.2
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    • pp.157-161
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    • 2008
  • Due to high speed operations and ultra low power consumptions RSFQ logic circuit is a very good candidate for future electronic device. The focus of the RSFQ circuit development has been on the advancement of analog-to-digital converters and microprocessors. Recent works on RSFQ ALU development showed the successful operation of an 1-bit block of ALU at 40 GHz. Recently, the study of an RSFQ analog-to-digital converter has been extended to the development of a single chip RF digital receiver. Compared to the voltage logic circuits, RSFQ circuits operate based on the pulse logic. This naturally leads the circuit structure of RSFQ circuit to be pipelined. Delay time on each pipelined stage determines the ultimate operating speed of the circuit. In simulations, a two junction Josephson transmission line's delay time was about 10 ps, a splitter's 14.5 ps, a switch's 13 ps, a half adder's 67 ps. Optimization of the 4-bit ALU circuit has been made with delay time consideration to operate comfortably at 10 GHz or above.

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Development of Seismic Monitoring Analysis System for HANARO (하나로 지진감시 분석시스템 개발)

  • 류정수;김형규;윤두병
    • Proceedings of the Computational Structural Engineering Institute Conference
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    • 2002.10a
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    • pp.330-337
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    • 2002
  • The HANARO seismic monitoring system is classified as non-nuclear safety(NNS), seismic category I, and quality class T The seismic monitoring system installed at the instrument room consists of five field sensors and one monitoring cabinet. The field sensors are composed of three triaxial accelerometers which installed at base slab, free field and overhead crane support respectively, a seismic trigger and a seismic switch at base slab. The most parts of analog system except field sensors are not produced any more, the improvement of the system is to be needed. The analog system with magnetic tape recorder is not only out-of-date model but dependent upon foreign technology. So it is difficult to get the spare parts and the cost to buy them is increased. Therefore we have improved the analog seismic monitoring system into a new digital seismic monitoring analysis system(SMAS) except five field sensors. After the installation of the new SMAS, we have carried out the site acceptance test(SAT) to confirm the field functions. The results of SAT satisfy the requirements of the fabrication technical specification. This new SMAS is operating at HANARO instrument room to acquire and analyse the signal of earthquake.

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Precision DC Amplifier Design using Semiconductor Chopper (반도체식 Chopper를 이용한 정밀직류증폭기의 설치)

  • 김원기
    • Journal of Biomedical Engineering Research
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    • v.2 no.1
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    • pp.55-64
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    • 1981
  • The important parameters of DC amplifier, which is widely use4 for the medical and engineering fields, are input offset voltage and temperature drift. Chopping amplifier reduces approximately 10% the parameters changing than monolithic operational amplifier. In this study, a chopping amplifier with semiconductor chopper is designed and tested, this chopper is realized by CMOS analog switch and timing circuits. The test results approve that designed amplifier is suitable for precision instrument DC amplifier.

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Development of body-fat measurable electronic scale. (체지방측정이 가능한 전자식 체중계의 개발)

  • Choi, Byung-Sang;Kim, Il-Hwan;Park, Chan-Won
    • Journal of Industrial Technology
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    • v.26 no.B
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    • pp.243-248
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    • 2006
  • The purpose of this study is to design a body-fat measurable electronic scale which can measure body impedance and weight. The hardware configuration of this system for the body-fat measurement includes a sinewave constant current generator, a analog switch circuit and a microprocessor with peripheral interface as well as electronic scale circuit. And the dedicated software is also designed for calculating body fat and body composition analysis from the result of the measurement.

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