• Title/Summary/Keyword: Analog performance

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The Design of High-Speed, High-Resolution D/A Converter for Digital Image Signal Processing with Deglitching Current Cell (글리치 방지 전류원을 이용한 고속 고정밀 디지탈 영상 신호 처리용 D/A 변환기 설계)

  • Lee, Seong-Dae;Jeong, Gang-Min
    • The Transactions of the Korea Information Processing Society
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    • v.1 no.4
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    • pp.469-478
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    • 1994
  • In this paper, a high speed, high resolution information processing digital- analog converter was designed for high definition color graphic, digital image signal processing, HDTV. For high speed operation, matrix type current cell array, latch which is not use pipelined, and two dimensional structure decoder using transmission gate were designed. It is adopted to fast-conversion, low-power implementation and exhibited high performance at linearity and accuracy. To reduce silicon area and to maintain resolution, current cell array composed of weighted and non-weighted current cells. In this paper, deglitching current cell design for high accuracy, new switching algorithm assert to reduce switching error. It's This circuit dissipates 130W with a 5-V power supply, and operate above 100MHz with 10 bit resolution.

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Implementation of low-noise, wideband ultrasound receiver for high-frequency ultrasound imaging (고주파수 초음파 영상을 위한 저잡음·광대역 수신 시스템 구현)

  • Moon, Ju-Young;Lee, Junsu;Chang, Jin Ho
    • The Journal of the Acoustical Society of Korea
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    • v.36 no.4
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    • pp.238-246
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    • 2017
  • High frequency ultrasound imaging typically suffers from low sensitivity due to the small aperture of high frequency transducers and shallow imaging depth due to the frequency-dependent attenuation of ultrasound. These limitations should be overcome to obtain high-frequency, high- resolution ultrasound images. One practical solution to the problems is a high-performance signal receiver capable of detecting a very small signal and amplifying the signal with minimal electronic noise addition. This paper reports a recently developed low-noise, wideband ultrasound receiver for high-frequency, high-resolution ultrasound imaging. The developed receiver has an amplification gain of up to 73 dB and a variable amplification gain range of 48 dB over an operating frequency of 80 MHz. Also, it has an amplification gain flatness of ${\pm}1dB$. Due to these high performances, the developed receiver has a signal-to-noise ratio of at least 8.4 dB and a contrast-to-noise ratio of at least 3.7 dB higher than commercial receivers.

A BJT Structure with High-Matching Property Fabricated Using CMOS Technology (CMOS 기술을 기반으로 제작된 정합 특성이 우수한 BJT 구조)

  • Jung, Yi-Jung;Kwon, Hyuk-Min;Kwon, Sung-Kyu;Jang, Jae-Hyung;Kwak, Ho-Young;Lee, Hi-Deok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.49 no.5
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    • pp.16-21
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    • 2012
  • For CMOS based bipolar junction transistor (BJT), a novel BJT structure which has higher matching property than conventional BJT structure was proposed and analyzed. The proposed structure shows a slight decrease of collector current density, $J_C$ about 0.361% and an increase of current gain, ${\beta}$ about 0.166% compared with the conventional structure. However, the proposed structure shows a decrease of area about 10% the improvement of matching characteristics of collector current ($A_{IC}$) and current gain ($A_{\beta}$) about 45.74% and 38.73% respectively. The improved matching characteristic of proposed structure is believed to be mainly due to the decreased distance between two emitters of pair BJTs, which results in the decreased effect of deep n-well of which resistance has the higher standard deviation than the other resistances.

An Implementation of IPMG for Multimedia Service with the Convergence of Broadcasting and Communications (통신방송의 융합형 멀티미디어 서비스를 지원하는 IPMG(IP Media Gateway) 구현)

  • Cho, Kwang-Hyun;Kim, Hyun-Cheol;Cho, Yok-Yon;Park, Deuk-In;Won, Heon;Ahn, Kwang-Yong
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.33 no.2B
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    • pp.59-68
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    • 2008
  • In order to activate the digital broadcasting in Korea, the analog broadcasting will have been closed down until 2012. Recently IPTV(Internet Protocol TV) thorough internet has been regarded as the fourth media following the terrestrial, satellite, and cable for the digital broad casting. And it has been the important medium for the communication and broadcasting system. However IP is not easy to replace the entire broadcasting system with the digital - type broadcasting system. For the digital broadcasting, we should replace all TV sets, install the settop-boxes to receive the various IP media, solve problems about time delaying when changing channels, and support communication and broadcasting consolidation service for such as PVR and Network CCTV. IPMG is the digital converter that is able to solve these problems. In this paper, I'll develop and analyze IPMG converter's performance which sends and receives both the analogue and digital broadcasting signals through various media gives the Network PVR service.

Cooperative Bayesian Compressed Spectrum Sensing for Correlated Signals in Cognitive Radio Networks (인지 무선 네트워크에서 상관관계를 갖는 다중 신호를 위한 협력 베이지안 압축 스펙트럼 센싱)

  • Jung, Honggyu;Kim, Kwangyul;Shin, Yoan
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.38B no.9
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    • pp.765-774
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    • 2013
  • In this paper, we present a cooperative compressed spectrum sensing scheme for correlated signals in decentralized wideband cognitive radio networks. Compressed sensing is a signal processing technique that can recover signals which are sampled below the Nyquist rate with high probability, and can solve the necessity of high-speed analog-to-digital converter problem for wideband spectrum sensing. In compressed sensing, one of the main issues is to design recovery algorithms which accurately recover original signals from compressed signals. In this paper, in order to achieve high recovery performance, we consider the multiple measurement vector model which has a sequence of compressed signals, and propose a cooperative sparse Bayesian recovery algorithm which models the temporal correlation of the input signals.

A study on the digital carrier recovery loop with adaptive loop bandwidth (적응 루프 대역폭을 가진 디지털 반송파 동기 루프에 관한 연구)

  • 한동석
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.8
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    • pp.1774-1781
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    • 1997
  • In this paper, we propose a full digital frequency and phase locked loop for CATV and HDTV receivers adopting VSB modulation. The CATV and HDTV receivers proposed by the Grand-Alliance in USA are ultilizing analog signal processing technology for carrier recovery. By the way, it is not a good architecture for the development of single chip ASIC operating in digital domain. To solve this problem while improving the performance, we first down convert the received r.f. signal to a near baseband signal for a low-rate AD converter and then we use digital signal processing techniques. The proposed system has the frequency pull-in range of -200 KHz +2.50 KHz. Moreover, it has the ability of adaptive loop bandwidth control according to the amount of frequency offset to improve the acquisition time while reducing the phase noise.

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Analysis and Specifications of Switching Frequency in Parallel Active Power Filters Regarding Compensation Characteristics

  • Guopeng, Zhao;Jinjun, Liu
    • Journal of Power Electronics
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    • v.10 no.6
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    • pp.749-761
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    • 2010
  • The switching frequency of a power device is a very important parameter in the design of a parallel active power filter (PAPF), but so far, very little discussion has been conducted on it in a quantitative manner in previous publications. In this paper, an extensive analysis on the effects of the switching frequency on the performance of a PAPF is made, and a specification of the switching frequency values with different compensation results is presented. A first-order inertia element and a second-order oscillation element are considered as approximate models of a PAPF, respectively. The compensation characteristic for each order of harmonic current is obtained at different switching frequencies. Then, the THDs of each model for the system loads of a rectifier with resistance and inductance loads are proposed. The compensation results of a PAPF controlled as a first-order inertia element are better than those of a PAPF controlled as a second-order oscillation element. With two types of system loads which are rectifier with resistance and inductance loads and rectifier with resistance, inductance and capacitance loads, the THDs of the source current after compensation are presented with different switching frequencies. The compensation characteristics for the most widely used digital control system are investigated. The situation with an analog control is the theoretical characteristic and it is the best situation. The compensation characteristic of the digital control is worse than the compensation characteristic of the theoretical characteristic. Based on these analyses, the specifications of compensation characteristics with different switching frequencies are quite straightforward. Finally, a practical design example is studied to verify the application.

Digitally Controlled Single-inductor Multiple-output Synchronous DC-DC Boost Converter with Smooth Loop Handover Using 55 nm Process

  • Hayder, Abbas Syed;Park, Young-Jun;Kim, SangYun;Pu, Young-Gun;Yoo, Sang-Sun;Yang, Youngoo;Lee, Minjae;Hwang, Keum Choel;Lee, Kang-Yoon
    • Journal of Power Electronics
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    • v.17 no.3
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    • pp.821-834
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    • 2017
  • This paper reports on a single-inductor multiple-output step-up converter with digital control. A systematic analog-to-digital-controller design is explained. The number of digital blocks in the feedback path of the proposed converter has been decreased. The simpler digital pulse-width modulation (DPWM) architecture is then utilized to reduce the power consumption. This architecture has several advantages because counters and a complex digital design are not required. An initially designed unit-delay cell is adopted recursively for the construction of coarse, intermediate, and fine delay blocks. A digital limiter is then designed to allow only useful code for the DPWM. The input voltage is 1.8 V, whereas output voltages are 2 V and 2.2 V. A co-simulation was also conducted utilizing PowerSim and Matlab/Simulink, whereby the 55 nm process was employed in the experimental results to evaluate the performance of the architecture.

Development of Tobacco Ripeness Grading Meter Using the Color Sensor (칼라센서를 이용한 담배 완숙도의 식별장치 개발)

  • 이대원;이용국
    • Journal of the Korean Society of Tobacco Science
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    • v.16 no.1
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    • pp.26-33
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    • 1994
  • A tobacco ripeness grading meter was designed and constructed using the color sensor, its performance was evaluated. A degree of ripeness grading of a leaf is very closely related to the measured tobacco leaf color. Measuring the small amount of the reflectance precisely depends on the apparatus including color sensor, light source, detector sensitivity, and geometric characteristics of appratus. To analyze and minimize the variational effects, experiments to select the proper condition were performed. Because of the combined effect mentioned above, the system has some variation on its response. Basis on the results of the experiments, prototype was developed and interfaced to a computer system. The main components of prototype included a tungsten lamp as a light source, Amorphous full color sensor with three filters, regulated D.C. power supply, OP - AMP(741 TC) for amplification, AR - B3001 board for interfacing to a computer with analog to digital conversion, and a compatible IBM PC XT computer. The experimental results of the developed ripeness tobacco leaf measurement system are summarized as following: [1] The output readings of ripeness grade meter for tobacco leaf, which is based on harvesting time, showed the apparent difference in variety of different quality. It was considered suitable that three filters(red, green, blue) in Amorphous full color sensor could be used in four different ripeness degree measurement of tobacco leaf. [2] The output readings of ripeness grade meter for tobacco leaf, which is based on government procurement, showed apparent difference in variety of different quality. Tobacco leaf varieties to stalk position are divided into tips, leaf, cutters, and primings, It is considered suitable that only red filter in the sensor could be used to classify the grade of tobacco leaf within the same kind tobacco stalk. However, the ripeness grade meter was not adequate to classify all the tobacco grades in the four different tobacco leaves.

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A speed controller design for low speed marine diesel engine by the $\mu$-synthesis ($\mu$-설계법에 의한 저속 박용디젤기관의 속도제어기 설계)

  • 정병건;양주호;김창화
    • Journal of Advanced Marine Engineering and Technology
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    • v.19 no.1
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    • pp.60-70
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    • 1995
  • In the field of marine transportation the energy saving is one of the most important factors for profit. In order to reduce the fuel oil consumption the ship's propulsion efficiency must be increased as much as possible. The propulsion efficiency depends upon a combination of an engine and a propeller. The propeller has better efficiency as lower rotational speed. This situation led the engine manufacturers to design the engine that has lower speed, longer stroke and a small number of cylinders. Consequently the variation of rotational torque became larger than before because of the longer delay-time in the fuel oil injection process and an increased output per cylinder. As this new trends the conventional mechanical-hydrualic governors for engine speed control have been replaced by digital speed controllers which adopted the PID control or the optimal control algorithm. But these control algorithms have not enough robustness to suppress the variation of the delay-time and the parameter pertubation. In this paper we consider the delay-time and the perturbation of engine parameters as the modeling uncetainties. Next we design the controller which has zero offset in steady state engine speed, based on the two-degree-of-freedom control theory and $\mu$-synthesis. Thd validity of the controller is investigated through the response simulation. We use a personal computer and an analog computer as the digital controller and the engine (plant) part respectively. And, we certify that the designed controller maintains its performance even though the engine parameters may vary.

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