• The Journal of Korean Institute of Communications and Information Sciences
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• v.23 no.5
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• pp.1349-1359
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• 1998

In this paper, presented is the result of a digital implementation of a FM stereo composite signal generator. The chip utilizing DDFS(Direct Digital Frequency Synthesizer architecture is implemented using $1.0\mu\textrm{m}$ CMOS gate-array technology thereby replacing analog componentry. To verify the process of generating composite signals a conventional logic simulation method was used. The processed chip was mounted on an evaluation PCB to test and analyze to signals. According to the measurement result obtained by using a 12-bit DAC, the digital FM composite signal generator produces a 74DB spectrally pure signal over its entire tuning range, which is superior to that of analog counterpart by 14dB in it spectral reponse. And further enhancements of the spectral response is expected to be achieved by using a high resolution digital to analog converter, such as a 16-bit DAC. The resulting signals is superior to the signal of the analoy circuitry typically used, in major characteristics such as S/N ratios, accuracy, tuning stability, and signal seperation.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.1
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• pp.33-38
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• 2008

The probability of an oscillation occurrence in M/W frequency conversion repeaters is low on account of the different operating frequency of the input and output signals. The probability of interference caused by the M/W frequency conversion repeaters to other systems is also low because the systems are used in the line-of-sight. Therefore M/W frequency conversion repeaters are generally used for retransmitting the signal received from base station to the islands. This paper describes the design and implementation of analog predistorter for M/W frequency conversion repeaters in mobile communications. The M/W repeaters convert IF frequency of 1010+/-10MHz to RF frequency of 11GHz. A predistorter can be designed for the M/W repeater operating in either IF or M/W frequency. In this paper IF predistorter operated in 1010MHz is designed and implemented because a M/W predistorter operated in 11GHz is difficult to implement. The IF predistorter can linearize RF modules in the repeater followed by IF stages. The performance test results show that the implemented analog predistorter improves ACPR of 10dB at the output power of 25dBm with the signal frequency of 10.805GHz.

• Journal of Industrial Convergence
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• v.22 no.7
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• pp.43-48
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• 2024

In this study, we evaluated the effectiveness of a taping method to relieve low back pain (LBP) by comparing changes in visual analog scale (VAS) and disability index (Disa) between untreated, control, and treated groups. As a result, the efficacy of taping was confirmed in both the control and treatment groups. ANOVA analysis of VAS revealed significant differences between groups, and post hoc tests revealed significant differences in the untreated group and both the control and treatment groups, but no significant differences between the control and treatment groups. This demonstrates similar effectiveness of both taping methods on alleviating LBP. For Disa, ANOVA showed a significant difference, but post hoc tests did not confirm this. The within-group t-test showed significant differences in VAS and Disa in the control and treatment groups before and after the intervention, but not in the untreated group. This study highlights the efficacy of taping for LBP and suggests that both methods can be used clinically. Future studies should use larger samples and different conditions to verify these findings.

• Journal of the Korea Society of Computer and Information
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• v.23 no.8
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• pp.1-7
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• 2018

Previous test equipment was bulky, took a long time to check, and was somewhat less economical. Since most of the checks were about analog signals, we preferred to check them using reference equipments. In this paper, a digital circuit design based on AITS is used to implement signals that can not utilize commercial measurement resources, and also designed and manufactured equipment that can inspect SRU. These test equipments were tested and evaluated by development, operation, and field evaluation, and they were installed to the Korean Field Force. This contributed to the improvement of operability by shortening the inspection time from 83.2 minutes to 7.8 minutes on average In addition, it did not utilize the reference equipment, so it could play a big role in lowering the mass production cost.

• Proceedings of the KIEE Conference
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• 2002.11c
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• pp.197-200
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• 2002

We newly developed the procedures of X-ray Cargo inspection system with acquisition of multi-channel data, analog to digital converter and post logic circuit which is controlled by the FPGA. The IEEE1149.1 standard defines a four-wire serial interface(a fifth wire is optional)to access complex integrated circuits(ICs) such as PLD. This paper describes that Boundary_Scan test method applied to our home made cargo inspection system.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.1862-1863
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• 2007

Testing the analog/mixed-signal circuitry of a mixed-signal IC has become a difficult task. Offset error, gain error, Non-monotonic behavior, Differential Non-linearity(DNL) error, Integral Non-linearity(INL) error are important specifications used as test parameters for DAC. In this paper, we propose an efficient BIST structure for DAC testing. The proposed BIST adds the circuit which uses the capacitor and op-amp, and accomplishes a test.

• 제어로봇시스템학회:학술대회논문집
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• 1997.10a
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• pp.11-16
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• 1997

This paper describes the grenade counting system developed for DPICM submunition analysis using the infrared video streams, and its some video stream processing technique. The video stream data processing procedure consists of four sequences; Analog infrared video stream recording, video stream capture, video stream pre-processing, and video stream analysis including the grenade counting. Some applications of this algorithms to real bursting test has shown the possibility of automation for submunition counting.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.35 no.10
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• pp.458-464
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• 1986

This paper introduces a method for design verification and performance evaluation of flight control system. The method is a real time hardware in the loop simulation using the hybrid computer and motion table facility. As a typical illustration, a roll control system of flight vehicle is applied. The simulation validity is demonstrated by comparing hardware test results with analog simulation results.

• Journal of Biomedical Engineering Research
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• v.2 no.1
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• pp.55-64
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• 1981

The important parameters of DC amplifier, which is widely use4 for the medical and engineering fields, are input offset voltage and temperature drift. Chopping amplifier reduces approximately 10% the parameters changing than monolithic operational amplifier. In this study, a chopping amplifier with semiconductor chopper is designed and tested, this chopper is realized by CMOS analog switch and timing circuits. The test results approve that designed amplifier is suitable for precision instrument DC amplifier.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.1137-1140
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• 1999

In this thesis, we research about Communication System Construction and Test-Bed Realization Method and Software’s Design with written program into Embedded Micro Controller’s restricted memory region using a DSP Chip to deal with mainly high speed communication. Tools used for modern communication network control use TI or AMD general chip class, but nevertheless responsibility for the point at issue, Analog Device is architecture design model moderated for small communication system. In this thesis, we present extended model, and realize basic case.