• Title/Summary/Keyword: Analog Circuits

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The Design of a I/O Interface Circuits for the Signal Driver of the Engine Control Relays and the Output Signal Monitoring of Diesel Generator (디젤 발전기 출력 신호의 모니터링 및 엔진제어 릴레이 구동을 위한 입출력 인터페이스 회로 설계)

  • Joo, Jae-hun;Kim, Jin-ae;Choi, Jung-Keyng
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2009.05a
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    • pp.547-550
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    • 2009
  • This paper presents a digital based input/output interface circuit for controlling and monitoring the Diesel Engine Generator for Emergency. In order to monitor and control of the Emergency Diesel Engine Generator, controlling and monitoring circuits need 5 analog input channels, 2 pick-up coil measuring circuits, 10 digital input channels containing Broken Wire Detect function, and 7 relay control signal output channels. This system performs signal processing of input signal taking advantage of simple filter circuit, photo-coupler and comparator circuit at analog input parts, and output signals for main relay is designed acting by double control, so it prevents malfunction completely. And it improves accuracy of speed input signal by applying digital circuit that processes pick-up coil signal.

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An Analog Maximum, Median, and Minimum Circuit in Current-mode

  • Sangjeen, Noawarat;Laikitmongkol, Sukum;Riewruja, Vanchai;Petchmaneelumka, Wandee;Julsereewong, Prasit
    • 제어로봇시스템학회:학술대회논문집
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    • 2003.10a
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    • pp.960-964
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    • 2003
  • In this paper, the CMOS integrated circuit technique for implementing current-mode maximum and minimum operations scheme is described. The maximum and minimum operations are incorporated into the same scheme with parallel processing. Using this scheme as the basic unit, an analog three-input maximum, median, and minimum circuit is designed. The performance of the proposed circuit shows a very sharp transfer characteristic and high accuracy. The proposed circuit achieves a high-speed operation, which is suitable for real-time systems. The PSPICE simulation results demonstrating the characteristic of the proposed circuit are included.

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A Current-Mode Analog Programmable EIR Filter for SDR Terminals

  • Shigehito Saigusa;Kim, Seong-Kweon;Shinji Ueda;Suguru Kameda;Hiroyuki Nakase;Kazuo Tsubouchi
    • Proceedings of the IEEK Conference
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    • 2002.07a
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    • pp.78-81
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    • 2002
  • We propose a current-mode analog programmable finite-impulse-response (FIR) filter with variable tap circuits. From the circuit simulation, the operation of the 7- tap FIR filter is confirmed. We design and fabricate the 0.0625-step tap circuit using 0.8$\mu\textrm{m}$ CMOS technology. The proposed FIR filter has a variable length of taps and variable coefficients, so it has a potential for being used to software defined radio (SDR) terminals.

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Development of the Integral LED Package Board Power Supply Circuits for Noise Cancellation (일체형 LED Package Board의 노이즈 제거 및 간소화된 전원 공급 회로 개발)

  • Yu, Young-Jin;Park, Jong-Chan
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.60 no.2
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    • pp.72-75
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    • 2011
  • In this paper, the voltage across the LED system supplied by positive voltage of power supply system the power consumption of the LED itself, and uses a lot of transformers and analog devices, such as converter startup problems and constant temperature even when the voltage driving abnormally LED current in the destruction caused by the flow of a lot of problems can occur. In this paper, we obtain the technology of consistent current using PWM(pulse width modulation) mode in order to minimize analog devices and eventually discuss the technology to develop consistent output converter using power drive IC.

The analog MPPT for the solar array of KOMPSAT (다목적 실용위성의 태양 전지를 위한 아날로그 MPPT)

  • Park Hee-Sung;Jang Sung-Soo;Park Sung-Woo;Jang Jin-Baek;Lee Jong-In
    • Proceedings of the KIPE Conference
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    • 2004.07a
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    • pp.105-108
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    • 2004
  • In this paper, the simple analog MPPT (Maximum Power Point Tracking) algorithm is proposed for the solar array of KOMPSAT (Korea Multi-Purpose Satellite). This method doesn't need any calculation of power by multiplication of voltage and current and a measurement of the solar array temperature. It is consist of only two sample and hold circuits, two comparators, a flip-flop, and an integrator. The proposed MPPT algorithm is verified by the simulation for the 100[W] solar array.

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A Development of 3 Phase Current Balance Control Algorithm (3상 전류평형 제어기술 알고리즘 개발)

  • Cheon, Y.S.;Seong, H.S.;Won, H.J.;Han, J.H.
    • Proceedings of the KIEE Conference
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    • 2001.07b
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    • pp.1091-1093
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    • 2001
  • The power semiconductor is widely used in the power plant or industrial field because of genealization and enlargement. It has been controlled and operated according to its own control method. Especially in case of Power plant, it plays a major role in AVR(Automatic Voltage Regulator) or electro chlorination control circuits. Generally, they used in Analog control system at above field. But each SCR current value is different because of load unbalance or switching characteristic variations, it may cause power plant unit trip or system disorder according to SCR element burn out or bad operating condition. Therefore, in this paper a development of 3 phase current balance control algorithm is described. it gets over the past analog control system limit, controls SCR gate firing angle for 3 phase current balance.

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Design of Analog Circuits for 13.56MHz RFID Tags (13.56MHz RFID Tag용 아날로그 회로 설계)

  • Kim, Kyung-Hwan;Han, Sang-Soo;On, Sung-Hoon;Park, Ji-Man;Yu, Chong-Gun
    • Proceedings of the KIEE Conference
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    • 2006.10c
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    • pp.166-168
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    • 2006
  • An analog front-end circuit for 13.56MHz ISO/IECl4443 type B compatible RFID tags was designed. The designed circuit includes a rectifier and regulator to generate a stable DC voltage from the RF signal, an over-voltage limiter to protect the circuit from high voltages, an ASK demodulator to extract the data transferred from reader to tag, and a load modulator to transfer data from tag to reader. The functionality of the designed circuit has been verified through simulations using 0.25um CMOS process parameters.

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A 8-bit Variable Gain Single-slope ADC for CMOS Image Sensor

  • Park, Soo-Yang;Son, Sang-Hee;Chung, Won-Sup
    • Journal of IKEEE
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    • v.11 no.1 s.20
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    • pp.38-45
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    • 2007
  • A new 8-bit single-slope ADC using analog RAMP generator with digitally controllable dynamic range has been proposed and simulated for column level or per-pixel CMOS image sensor application. The conversion gain of ADC can he controlled easily by using frequency divider with digitally controllable diviber ratio, coarse/fine RAMP with class-AB op-amp, resistor strings, decoder, comparator, and etc. The chip area and power consumption can be decreased by simplified analog circuits and passive components. Proposed frequency divider has been implemented and verified with 0.65um, 2-poly, 2-metal standard CMOS process. And the functional verification has been simulated and accomplished in a 0.35$\mu$m standard CMOS process.

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Behavioral Current-Voltage Model with Intermediate States for Unipolar Resistive Memories

  • Kim, Young Su;Min, Kyeong-Sik
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.13 no.6
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    • pp.539-545
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    • 2013
  • In this paper, a behavioral current-voltage model with intermediate states is proposed for analog applications of unipolar resistive memories, where intermediate resistance values between SET and RESET state are used to store analog data. In this model, SET and RESET behaviors are unified into one equation by the blending function and the percentage volume fraction of each region is modeled by the Johnson-Mehl-Avrami (JMA) equation that can describe the time-dependent phase transformation of unipolar memory. The proposed model is verified by the measured results of $TiO_2$ unipolar memory and tested by the SPECTRE circuit simulation with CMOS read and write circuits for unipolar resistive memories. With the proposed model, we also show that the behavioral model that combines the blending equation and JMA kinetics can universally describe not only unipolar memories but also bipolar ones. This universal behavioral model can be useful in practical applications, where various kinds of both unipolar and bipolar memories are being intensively studied, regardless of polarity of resistive memories.

A Pipelined 60Ms/s 8-bit Analog to Digital Converter (8-bit 60Ms/s 파이프라인 아날로그 디지털 변환기)

  • 조은상;정강민
    • Proceedings of the IEEK Conference
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    • 2001.06b
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    • pp.253-256
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    • 2001
  • This paper introduces the design of high-speed analog- to-digital converter for high-definition TV, camcorders, portable equipments and implemented in a 0.65${\mu}{\textrm}{m}$ CMOS technology. Key circuits developed for low power and high speed A/D converter are a dynamic comparator that consumes no static power, a source follower buffered op amp that achives wide bandwidth using large input devices. The converter achieves low power dissipation of 40-mW at 3.3-V power supply. Measured performance includes 0.53 LSB of INL and 0.48 LSB of DNL while sampling at 60MHz.

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