• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.1
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• pp.20-28
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• 2003

In this paper, we present results of the comparative analysis of the flicker phenomena in the poly-Si TFT-LCD and a-Si:H TFT-LCD arrays for the development and manufacturing of wide-area and high-quality TFT-LCD displays. We used four different types of TFTs; a-Si:H TFT, excimer laser annealed (ELA) poly-Si TFT, silicide mediated crystallization (SMC) poly-Si TFT, and counter-doped lateral body terminal (LBT), poly-Si TFT. We defined the electrical quantity of the flicker so that we could compare the flickers quantitatively for four different 40" UXGA TFT-LCDs. We identify three factors contributing to the flicker, such as charging time, kickback voltage and leakage current, and analyze how much each of three factors give rise to the flincker in the different TFT-LCD arrays. In addition, we suggest and show that, in the case of the poly-Si TFT-LCD arrays, the low-level (minimum) gate voltages should be carefully chosen to minimize the flicker because of their larger leakage currents compared with a-Si TFT-LCD arrays.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.151-151
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• 2010

In this paper, the electrically properties of nonvolatile memory (NVM) using multi-stacks gate insulators of oxide-nitride-oxynitride (ONOn) and active layer of the low temperature polycrystalline silicon (LTPS) were investigated. From hydrogenated amorphous silicon (a-Si:H), the LTPS thin films with high crystalline fraction of 96% and low surface's roughness of 1.28 nm were fabricated by the metal induced crystallization (MIC) with annealing conditions of $650^{\circ}C$ for 5 hours on glass substrates. The LTPS thin film transistor (TFT) or the NVM obtains a field effect mobility of ($\mu_{FE}$) $10\;cm^2/V{\cdot}s$, threshold voltage ($V_{TH}$) of -3.5V. The results demonstrated that the NVM has a memory window of 1.6 V with a programming and erasing (P/E) voltage of -14 V and 14 V in 1 ms. Moreover, retention properties of the memory was determined exceed 80% after 10 years. Therefore, the LTPS fabricated by the MIC became a potential material for NVM application which employed for the system integration of the panel display.

• Korean Journal of Metals and Materials
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• v.47 no.7
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• pp.423-432
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• 2009

In the galvanizing coating process, the effects of the silicon content on the coatability and wettability of molten zinc were investigated on Dual-Phase High Strength Steels (DP-HSS) with various Si contents using the galvanizing simulator and dynamic reactive wetting systems. DP-HSS showed good coatability and a well-developed inhibition layer in the range of Si content below 0.5 wt%. Good coatability was the results of the mixed oxide $Mn_{2}SiO_{4}$, being formed by the selective oxidation on the surface, with a low contact angle in molten zinc and a large fraction of oxide free surface that provided a sufficient site for the molten zinc to wet and react with the substrate. On the other hand, with more than 0.5 wt%, DP-HSS exhibited poor coatability and an irregularly developed inhibition layer. The poor coatability was due to the poor wettability that resulted from the development of network-type layers of amorphous ${SiO}_{2}$, leading to a high contact angle in molten zinc, on the surface.

• Korean Journal of Metals and Materials
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• v.50 no.8
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• pp.575-582
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• 2012

Medium carbon steel was aluminized by hot dipping into molten Al or Al-1 at% Si baths. After hot-dipping in these baths, a thin Al-rich topcoat and a thick alloy layer rich in $Al_5Fe_2$ formed on the surface. A small amount of FeAl and $Al_3Fe$ was incorporated in the alloy layer. Silicon from the Al-1 at% Si bath was uniformly distributed throughout the entire coating. The hot dipping increased the microhardness of the steel by about 8 times. Heating at $700-1000^{\circ}C$, however, decreased the microhardness through interdiffusion between the coating and the substrate. The oxidation at $700-1000^{\circ}C$ in air formed a thin protective ${\alpha}-Al_2O_3$ layer, which provided good oxidation resistance. Silicon was oxidized to amorphous silica, exhibiting a glassy oxide surface.

• Corrosion Science and Technology
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• v.21 no.6
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• pp.445-453
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• 2022

SiO_x was prepared from a mixture of Si and SiO₂ via high-energy ball milling as a negative electrode material for Li-ion batteries. The molar ratio of Si to SiO₂ as precursors and the milling time were varied to identify the synthetic condition that could exhibit desirable anode performances. With an appropriate milling time, the material showed a unique microstructure in which amorphous Si nanoparticles were intimately embedded within the SiO₂ matrix. The interface between the Si and SiO₂ was composed of silicon suboxides with Si oxidation states from 0 to +4 as proven by X-ray photoelectron spectroscopy and electrochemical analysis. With the addition of a conductive carbon (Super P carbon black) as a coating material, the SiO_x/C manifested superior specific capacity to a commercial SiO_x/C composite without compromising its cycle-life performance. The simple mechanochemical method described in this study will shed light on cost-effective synthesis of high-capacity silicon oxides as promising anode materials.

• Current Photovoltaic Research
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• v.12 no.2
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• pp.41-47
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• 2024

CIGS solar cells are thin film solar cells that have excellent light absorption coefficient and can be manufactured with high efficiency through the use of low materials. In Korea, they must pass KS certification for home and commercial installation. KS C 8562 is a standard for evaluating the durability of CIGS and thin film amorphous silicon solar modules and deals with contents such as light, temperature, humidity, and mechanical durability. Unlike general crystalline silicon solar modules, the CIGS solar module has a different behavior of output change through these environmental tests, so if it shows 90% or more of the rated output suggested by the manufacturer after the final test, it is judged to be a suitable product. In this paper, the output before and after individual tests was measured through the test method of KS C 8562 to observe the output change and to discover the vulnerabilities of the CIGS solar module when exposed to various environments. Through this, it was confirmed that humidity exposure was the most vulnerable and that it had output recovery characteristics for light (visible light and ultraviolet rays). This study attempted to present the output behavior characteristics and data of the CIGS module at the time when the high efficiency thin film photovoltaic module market is expected to be created in the future.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.151-151
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• 2009

Recently, there has been increasing interest in amorphous oxide semiconductors to find alternative materials for an amorphous silicon or organic semiconductor layer as a channel in thin film transistors(TFTs) for transparent electronic devices owing to their high mobility and low photo-sensitivity. The fabriction of amorphous oxide-based TFTs at room temperature on plastic substrates is a key technology to realize transparent flexible electronics. Amorphous oxides allows for controllable conductivity, which permits it to be used both as a transparent semiconductor or conductor, and so to be used both as active and source/drain layers in TFTs. One of the materials that is being responsible for this revolution in the electronics is indium-zinc-tin oxide(IZTO). Since this is relatively new material, it is important to study the properties of room-temperature deposited IZTO thin films and exploration in a possible integration of the material in flexible TFT devices. In this research, we deposited IZTO thin films on polyethylene naphthalate substrate at room temperature by using magnetron sputtering system and investigated their properties. Furthermore, we revealed the fabrication and characteristics of top-gate-type transparent TFTs with IZTO layers, seen in Fig. 1. The experimental results show that by varying the oxygen flow rate during deposition, it can be prepared the IZTO thin films of two-types; One a conductive film that exhibits a resistivity of $2\times10^{-4}$ ohm${\cdot}$cm; the other, semiconductor film with a resistivity of 9 ohm${\cdot}$cm. The TFT devices with IZTO layers are optically transparent in visible region and operate in enhancement mode. The threshold voltage, field effect mobility, on-off current ratio, and sub-threshold slope of the TFT are -0.5 V, $7.2\;cm^2/Vs$, $\sim10^7$ and 0.2 V/decade, respectively. These results will contribute to applications of select TFT to transparent flexible electronics.

• 한국신재생에너지학회:학술대회논문집
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• 2010.06a
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• pp.59.1-59.1
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• 2010

Aluminum-induced crystallization (AIC) of amorphous silicon (a-Si) is studied with the structure of a glass/Al/$SiO_2$/a-Si, in which the $SiO_2$ layer has micron-sized laser holes in the stack. An oxide layer between aluminum and a-Si thin films plays a significant role in the metal-induced crystallization (MIC) process determining the properties such as grain size and preferential orientation. In our case, the crystallization of a-Si is carried out only through the key hole because the $SiO_2$ layer is substantially thick enough to prevent a-Si from contacting aluminum. The crystal growth is successfully realized toward the only vertical direction, resulting a crystalline silicon grain with a size of $3{\sim}4{\mu}m$ under the hole. Lateral growth seems to be not occurred. For the AIC experiment, the glass/Al/$SiO_2$/a-Si stacks were prepared where an Al layer was deposited on glass substrate by DC sputter, $SiO_2$ and a-Si films by PECVD method, respectively. Prior to the a-Si deposition, a $30{\times}30$ micron-sized hole array with a diameter of $1{\sim}2{\mu}m$ was fabricated utilizing the femtosecond laser pulses to induce the AIC process through the key holes and the prepared workpieces were annealed in a thermal chamber for 2 hours. After heat treatment, the surface morphology, grain size, and crystal orientation of the polycrystalline silicon (pc-Si) film were evaluated by scanning electron microscope, transmission electron microscope, and energy dispersive spectrometer. In conclusion, we observed that the vertical crystal growth was occurred in the case of the crystallization of a-Si with aluminum by the MIC process in a small area. The pc-Si grain grew under the key hole up to a size of $3{\sim}4{\mu}m$ with the workpiece.

• Journal of the Korean Vacuum Society
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• v.17 no.6
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• pp.528-537
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• 2008

60 nm and 20 nm thick hydrogenated amorphous silicon(a-Si:H) layers were deposited on 200 nm $SiO_2$/single-Si substrates by inductively coupled plasma chemical vapor deposition(ICP-CVD). Subsequently, 30 nm-Ni layers were deposited by an e-beam evaporator. Finally, 30 nm-Ni/(60 nm and 20 nm) a-Si:H/200 nm-$SiO_2$/single-Si structures were prepared. The prepared samples were annealed by rapid thermal annealing(RTA) from $200^{\circ}C$ to $500^{\circ}C$ in $50^{\circ}C$ increments for 40 sec. A four-point tester, high resolution X-ray diffraction(HRXRD), field emission scanning electron microscopy(FE-SEM), transmission electron microscopy(TEM), and scanning probe microscopy(SPM) were used to examine the sheet resistance, phase transformation, in-plane microstructure, cross-sectional microstructure, and surface roughness, respectively. The nickel silicide from the 60 nm a-Si:H substrate showed low sheet resistance from $400^{\circ}C$ which is compatible for low temperature processing. The nickel silicide from 20 nm a-Si:H substrate showed low resistance from $300^{\circ}C$. Through HRXRD analysis, the phase transformation occurred with silicidation temperature without a-Si:H layer thickness dependence. With the result of FE-SEM and TEM, the nickel silicides from 60 nm a-Si:H substrate showed the microstructure of 60 nm-thick silicide layers with the residual silicon regime, while the ones from 20 nm a-Si:H formed 20 nm-thick uniform silicide layers. In case of SPM, the RMS value of nickel silicide layers increased as the silicidation temperature increased. Especially, the nickel silicide from 20 nm a-Si:H substrate showed the lowest RMS value of 0.75 at $300^{\circ}C$.

• Korean Journal of Materials Research
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• v.22 no.4
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• pp.190-194
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• 2012

The formation of high-quality polycrystalline silicon (poly-Si) on relatively low cost substrate has been an important issue in the development of thin film solar cells. Poly-Si seed layers were fabricated by an inverse aluminum-induced crystallization (I-AIC) process and the properties of the resulting layer were characterized. The I-AIC process has an advantage of being able to continue the epitaxial growth without an Al layer removing process. An amorphous Si precursor layer was deposited on Corning glass substrates by RF magnetron sputtering system with Ar plasma. Then, Al thin film was deposited by thermal evaporation. An $SiO_2$ diffusion barrier layer was formed between Si and Al layers to control the surface orientation of seed layer. The crystallinity of the poly-Si seed layer was analyzed by Raman spectroscopy and x-ray diffraction (XRD). The grain size and orientation of the poly-Si seed layer were determined by electron back scattering diffraction (EBSD) method. The prepared poly-Si seed layer showed high volume fraction of crystalline Si and <100> orientation. The diffusion barrier layer and processing temperature significantly affected the grain size and orientation of the poly Si seed layer. The shorter oxidation time and lower processing temperature led to a better orientation of the poly-Si seed layer. This study presents the formation mechanism of a poly seed layer by inverse aluminum-induced crystallization.