• Journal of Convergence for Information Technology
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• v.9 no.5
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• pp.117-124
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• 2019

This paper discusses recent trends in the fabrication of semiconducting materials among the components of thin film transistors used in AMOLED display. In order to obtain a good semiconductor film, it is necessary to change the amorphous silicon into polycrystalline silicon. There are two ways to use laser and heat. Laser-based methods include sequential lateral solidification (SLS), excimer laser annealing (ELA), and thin-beam directional crystallization (TDX). Solid phase crystallization (SPC), super grain silicon (SGS), metal induced crystallization (MIC) and field aided lateral crystallization (FALC) were crystallized using heat. We will also study research for manufacturing large AMOLED displays.

• Korean Journal of Metals and Materials
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• v.49 no.4
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• pp.321-328
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• 2011

The 30 nm-thick Ni layers was deposited on a flexible polyimide substrate with an e-beam evaporation. Subsequently, we deposited a Si layer using a catalytic CVD (Cat-CVD) in a hydride amorphous silicon (${\alpha}$-Si:H) process of $T_{s}=180^{\circ}C$ with varying thicknesses of 55, 75, 145, and 220 nm. The sheet resistance, phase, degree of the crystallization, microstructure, composition, and surface roughness were measured by a four-point probe, HRXRD, micro-Raman spectroscopy, FE-SEM, TEM, AES, and SPM. We confirmed that our newly proposed Cat-CVD process simultaneously formed both NiSi and crystallized Si without additional annealing. The NiSi showed low sheet resistance of < $13{\Omega}$□, while carbon (C) diffused from the substrate led the resistance fluctuation with silicon deposition thickness. HRXRD and micro-Raman analysis also supported the existence of NiSi and crystallized (>66%) Si layers. TEM analysis showed uniform NiSi and silicon layers, and the thickness of the NiSi increased as Si deposition time increased. Based on the AES depth profiling, we confirmed that the carbon from the polyimide substrate diffused into the NiSi and Si layers during the Cat-CVD, which caused a pile-up of C at the interface. This carbon diffusion might lessen NiSi formation and increase the resistance of the NiSi.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.218-221
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• 2008

Bottom-gate microcrystalline silicon thin film transistors (${\mu}c$-Si:H TFTs) were fabricated on glass and transparent polyimide substrates by conventional 13.56 MHz RF plasma enhanced chemical vapor deposition at $200^{\circ}C$. The deposition rate of the ${\mu}c$-Si:H film is 24 nm/min and the amorphous incubation layer near the ${\mu}c$-Si:H/silicon nitride interface is unobvious. The threshold voltage of ${\mu}c$-Si:H TFTs can be improved by $H_2$ or $NH_3$ plasma pretreatment silicon nitride film.

• Journal of the Korean Ceramic Society
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• v.27 no.2
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• pp.219-225
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• 1990

Silicon dioxide thin film has been grown by a chemical vapor deposition (CVD) technique using SiH4, and O2 gaseous mixture on a silicon substrate. The experimental results indicated that the deposition rate as a function of the input ratio (O2/SiH4) shows two regions, increasing region and decreasing region. Also the deposition rate increases with increasing the deposition temperature. The microstructure of deposited silicon dioxide films is amorphous. The experimental results of infrared absorption spectrums indicate that Si-H and Si-OH bond increase with decreasing input ratio, but Si-O bond is independent on the input ratio. The interfacial charge of deposited silicon dioxide decreases with increasing input ratio.

• Proceedings of the IEEK Conference
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• 2001.10a
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• pp.705-710
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• 2001

So for the quartz-glassy crucible wastes which was used for pulling up silicon-single-crystal ingot have simply reused for refractory raw-materials, or exhausted. This study is concerned on the advanced recycling-technology that is obtained by the proper micro-particle preparation process in order to fabricate fine amorphous silica filler for EMC (Epoxy Molding Compound). Therefore, this paper will deal with the physical, chemical and thermal pre-treatment process for efficient impurity removal and with the proper micro-particle process for producing the amorphous silicafiller. In view of the results, if the chemical, physical and thermal pre-treatment process for efficient elimination of impurity was passed, the purity of wasted fused glassy crucible is almost equal to the its of first anhydrous quartz glass. Thus, it was understood that this wasted fused glassy crucible was sufficient value of recycling, though it was damaged. When the ingot was fabricated, Phase transformation of crystallization by heat treatment (heat hysteresis phenomenon) was not changed. So, it was understood that as fused silica in the amorphous state, as It is, recycling possibility was very high

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.29 no.7
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• pp.400-403
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• 2016

The resistive memory switching characteristics of resistive random access memory (ReRAM) using the amorphous GeSe thin film have been demonstrated at Al/Ti/GeSe/$n^+$ poly Si structure. This ReRAM indicated bipolar resistive memory switching characteristics. The generation and the recombination of chalcogen cations and anions were suitable to explain the bipolar switching operation. Space charge limited current (SCLC) model and Poole-Frenkel emission is applied to explain the formation of conductive filament in the amorphous GeSe thin film. The results showed characteristics of stable switching and excellent reliability. Through the annealing condition of $400^{\circ}C$, the possibility of low temperature process was established. Very low operation current level (set current: ~ ${\mu}A$, reset current: ~ nA) was showed the possibility of low power consumption. Particularly, $n^+$ poly Si based GeSe ReRAM could be applied directly to thin film transistor (TFT).

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.30 no.6
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• pp.271-276
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• 2020

In this study, an amorphous SiC block was manufactured using polycarbosilane (PCS), an organosilicon polymer. The dense SiC blocks were easily fabricated in various shapes via pyrolysis at 1100℃, 1200℃, 1300℃, 1400℃ after manufacturing a PCS molded body using cured PCS powder. Physical and chemical properties were analyzed using a thermogravimetric analyzer (TGA), scanning electron microscope (SEM), energy dispersive spectroscopy (EDS), and universal testing machine (UTM). The prepared SiC block was decomposed into SiO and CO gas as the temperature increased, and β-SiC crystal grains were grown in an amorphous structure. In addition, the density and flexural strength were the highest at 1.9038 g/㎤ and 6.189 MPa of SiC prepared at 1100℃. The manufactured amorphous silicon carbide block is expected to be applicable to other fields, such as the previously reported microwave assisted heating element.

• Journal of the Korean Ceramic Society
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• v.53 no.3
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• pp.295-300
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• 2016

To investigate the thermal conductivity and the structural properties of naturally cooled excimer-laser annealed Si, molecular-dynamics (MD) simulations have been performed. The thermal conductivity of crystalline Si (c-Si) was measured by direct method at 1000 K. Steady-state heat flow was measured using a stationary temperature profile; significant deviations from Fourier's law were not observed. Reliable processes for measuring the thermal conductivity of c-Si were presented. A natural cooling process to admit heat flow from molten Si (l-Si) to c-Si was performed using an MD cell with a size of $48.9{\times}48.9{\times}97.8{\AA}^3$. During the cooling process, the temperature of the bottom $10{\AA}$ of the MD cell was controlled at 300 K. The results suggest that the natural cooling system described the static structural property of amorphous Si (a-Si) well.

• Transactions on Electrical and Electronic Materials
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• v.18 no.2
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• pp.70-73
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• 2017

We investigated n-i-p type single junction hydrogenated amorphous silicon oxide solar cells. These cells were without front surface texture or back reflector. Maximum power point efficiency of these cells showed that an optimized device structure is needed to get the best device output. This depends on the thickness and defect density ($N_d$) of the active layer. A typical 10% photovoltaic device conversion efficiency was obtained with a $N_d=8.86{\times}10^{15}cm^{-3}$ defect density and 630 nm active layer thickness. Our investigation suggests a correlation between defect density and active layer thickness to device efficiency. We found that amorphous silicon solar cell efficiency can be improved to well above 10%.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.316.2-316.2
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• 2016

Device가 점점 Shrinkage 됨에 따라 미세 패터닝을 위하여 기존에 사용하던 박막은 Hardmask 로써 CD(Critical Dimension)가 제한적으로 이를 개선하기 위한 비정질 실리콘 (amorphous silicon)으로 대체하여 사용되는 Layer의 수가 증가하고 있다. 하지만 비정질 실리콘을 증착 시, 하부막에 따른 Adhesion 및 Hillocks과 같은 공정상에서 발생하는 문제들이 발생하게 되는데, 이는 소자의 특성을 떨어뜨리게 된다. 이러한 문제를 해결하고자 본 연구에서는 PECVD를 사용하여 비정질 실리콘 박막을 증착하였고, 그 특성을 분석하였으며, Adhesion 및 Hillock 개선을 위해 비정질 실리콘 박막 증착 전 처리를 최적화하여 특성을 개선하였다. 증착된 박막의 두께 및 굴절률은 Auto thickness measurement로 분석하였고, 표면 특성은 Field emission scanning electron microscopy(FE-SEM 그림 참고), 4 Point Bending TEST를 이용하여 분석을 수행하였다.