• 한국신재생에너지학회:학술대회논문집
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• 한국신재생에너지학회 2005년도 춘계학술대회
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• pp.102-108
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• 2005

We have developed highly stabilized (p-i-n)-type protocrystalline silicon (pc-Si:H) multilayer solar cells. To achieve a high conversion efficiency, we applied a double-layer p-type amorphous silicon-carbon alloy $(p-a-Si_{1-x}C_x:H)$ structure to the pc-Si:H multilayer solar cells. The less pronounced initial short wavelength quantum efficiency variation as a function of bias voltage proves that the double $(p-a-Si_{1-x}C_x:H)$ layer structure successfully reduces recombination at the p/i interface. It was found that a natural hydrogen treatment involving an etch of the defective undiluted p-a-SiC:H window layer before the hydrogen-diluted p-a-SiC:H buffer layer deposition and an improvement of the order in the window layer. Thus, we achieved a highly stabilized efficiency of $9.0\%$ without any back reflector.

• 한국표면공학회지
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• 제43권1호
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• pp.7-11
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• 2010

Solid phase crystallization (SPC) is a simple method in producing a polycrystalline phase by annealing amorphous silicon (a-Si) in a furnace environment. Main motivation of the crystallization technique is to fabricate low temperature polycrystalline silicon thin film transistors (LTPS-TFTs) on a thermally susceptible glass substrate. Studies on SPC have been naturally focused to the low temperature regime. Recently, fabrication of polycrystalline silicon (poly-Si) TFT circuits from a high temperature polycrystalline silicon process on steel foil substrates was reported. Solid phase crystallization of a-Si films proceeds by nucleation and growth. After nucleation polycrystalline phase is propagated via twin mediated growth mechanism. Elliptically shaped grains, therefore, contain intra-granular defects such as micro-twins. Both the intra-granular and the inter-granular defects reflect the crystallinity of SPC poly-Si. Crystallinity and SPC kinetics of high temperatures were compared to those of low temperatures using Raman analysis newly proposed in this study.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 제36회 하계학술대회 논문집 C
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• pp.2052-2054
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• 2005

TFT-LCD requires to use poly silicon for High resolution and High integration. Thin film make of Poly silicon on the excimer laser-induced crystallization of PECVD(plasma-enhanced chemical vapor deposition)-grown amorphous silicon. In the thin film hydrogen affects to a device performance from bad elements like eruption, void and etc. So dehydrogenation prior to laser exposure was necessary. In this study, use RTP(Rapid Thermal Process) at various temperature from $670^{\circ}C$ to $750^{\circ}C$ and fabricate poly-silicon. it propose optimized RTP window to compare grain size to use poly silicon's SEM pictures and crystallization to analyze Raman curved lines.

• 융합정보논문지
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• 제7권5호
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• pp.123-128
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• 2017

나노구조를 갖는 물질들은 나노구조물이 갖는 고유의 체적 대비 높은 표면적 비와 양자 갇힘 효과에 기인하는 독특한 전기적, 광학적, 광전기적, 자기적 특성으로 인하여 많은 주목을 받아왔다. 열화학 기상 증착 공정은 나노 구조물의 성장과정에서 다양한 구조를 갖는 나노소재의 합성 능력 때문에 더욱 주목을 받아왔다. 본 연구에서는 두 영역 열화학 기상 증착법과 소스 물질 $TiO_2$ 파우더를 이용하여 VLS 공정으로 Si\$SiO_2$(300 nm)\Pt(5~40 nm) 기판 위에 실리콘 옥사이드 나노와이어를 성장시켰다. 성장된 실리콘 옥사이드 나노와이어의 형상과 결정학적 특성을 전계방출 주사전자현미경과 투과전자현미경으로 분석하였다. 분석결과, 성장된 실리콘 옥사이드 나노와이어의 형상인 지름과 길이는 촉매 박막의 두께에 의존하여 다른 모양을 나타내었다. 또한 성장된 실리콘 옥사이드 나노와이어는 비정질 상을 갖는 것으로 분석되었다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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• pp.406-406
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• 2016

To get high efficiency n-type crystalline silicon solar cells, passivation is one of the key factor. Tunnel oxide (SiO2) reduce surface recombination as a passivation layer and it does not constrict the majority carrier flow. In this work, the passivation quality enhanced by different chemical solution such as HNO3, H2SO4:H2O2 and DI-water to make thin tunnel oxide layer on n-type crystalline silicon wafer and changes of characteristics by subsequent annealing process and firing process after phosphorus doped amorphous silicon (a-Si:H) deposition. The tunneling of carrier through oxide layer is checked through I-V measurement when the voltage is from -1 V to 1 V and interface state density also be calculated about $1{\times}1012cm-2eV-1$ using MIS (Metal-Insulator-Semiconductor) structure . Tunnel oxide produced by 68 wt% HNO3 for 5 min on $100^{\circ}C$, H2SO4:H2O2 for 5 min on $100^{\circ}C$ and DI-water for 60 min on $95^{\circ}C$. The oxide layer is measured thickness about 1.4~2.2 nm by spectral ellipsometry (SE) and properties as passivation layer by QSSPC (Quasi-Steady-state Photo Conductance). Tunnel oxide layer is capped with phosphorus doped amorphous silicon on both sides and additional annealing process improve lifetime from $3.25{\mu}s$ to $397{\mu}s$ and implied Voc from 544 mV to 690 mV after P-doped a-Si deposition, respectively. It will be expected that amorphous silicon is changed to poly silicon phase. Furthermore, lifetime and implied Voc were recovered by forming gas annealing (FGA) after firing process from $192{\mu}s$ to $786{\mu}s$. It is shown that the tunnel oxide layer is thermally stable.

• 대한전자공학회논문지
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• 제25권5호
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• pp.501-508
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• 1988

This paper presents the light-induced effects on the elelctrical and optical properties of undoped and doped hydrogenated amorphous silicon films. The changes in the conductivities and the activation energies of various types of a-Si:H films due to the prolonged exposure to light have been characterized as a function of deposition conditions and illumination periods. The dark conductivity changes may be quenched for heavier doped a-Si:H films. We have also analyzed the variations of micro-structure of a-Si:H film such as silicon-hydrogen bondings in the rocking and stretching modes utilizing infrared spectroscopy. From the experimental results, it is elucidated that doping effects must be crucial to the degradations of the fundamental properties of a-Si:H due to light-induced effects.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
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• pp.257.2-257.2
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• 2015

In this paper, we report on the 10.33% efficient thin film/bulk tandem solar cells with the top cell made of amorphous silicon thin film and p-type bulk crystalline silicon bottom cell. The tunneling junction layers were used the doped nanocrystalline Si layers. It has to allow an ohmic and low resistive connection. For player and n-layer, crystalline volume fraction is ~86%, ~88% and dark conductivity is $3.28{\times}10-2S/cm$, $3.03{\times}10-1S/cm$, respectively. Optimization of the tunneling junction results in fill factor of 66.16 % and open circuit voltage of 1.39 V. The open circuit voltage was closed to the sum of those of the sub-cells. This tandem structure could enable the effective development of a new concept of high-efficiency and low cost cells.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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• pp.413-418
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• 2006

Highly stable thin-film transistor (TFT) pixel employing both low temperature polycrystalline silicon (LTPS) and amorphous silicon (a-Si) for active matrix organic light emitting diode (AMOLED) is discussed. ELA (excimer laser annealing) LTPS-TFT pixel should compensate $I_{OLED}$ variation caused by the non-uniformity of LTPS-TFT due to the fluctuation of excimer laser energy and amorphous silicon TFT pixel is desired to suppress the decrease of $I_{OLED}$ induced by the degradation of a-Si TFT. We discuss various compensation schemes of both LTPS and a-Si TFT employing the voltage and the current programming.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 ITC-CSCC -2
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• pp.1050-1053
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• 2002

In this paper, Amorphous silicon on glass substrate was recrystallized to poly-crystalline silicon by solid phase crystallization (SPC) technology. The active region of thin film transistor (TFT) was fabricated by amorphous silicon. The output and transfer characteristics of thin film transistor with lightly doped drain (LDD) structure was measured and analyzed. As a results, analyzed TFTs reliability with LDD's length by various kinds argument such as sub-threshold swing coefficient, mobility and threshold voltages were evaluated. Stress effects in TFT were able to improve to the characteristics of turn-on current and hot carrier effects by LDD's length variations.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 하계종합학술대회 논문집(2)
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• pp.185-188
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• 2002

In this paper, Amorphous silicon on glass substrate was recrytallized to poly-crystalline silicon by solid phase crystallization(SPC) technology The active region of thin film transistor(TFT) was fabricated by amorphous silicon. The output and transfer characteristics of thin film transistor with lightly doped drain(LDD) structure was measured and analyzed. As a results, analyzed TFT's reliability with LDD's length by various kinds argument such as sub-threshold swing coefficient, mobility and threshold voltages were evaluated. Stress effects in TFT were able to improve to the characteristics of turn-on current and hot carrier effects by LDD's length variations