• Proceedings of the Materials Research Society of Korea Conference
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• 1998.08a
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• pp.72.4-72
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• 1998

• Journal of Welding and Joining
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• v.29 no.5
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• pp.95-98
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• 2011

Recently, there is a growing tendency that fine-pitch electronic devices are increased due to higher density and very large scale integration. Finer pitch printed circuit board(PCB) is to be decrease insulation resistance between circuit patterns and electrical components, which will induce to electrical short in electronic circuit by electrochemical migration when it exposes to long term in high temperature and high humidity. In this research, the effect of soldering flux acting as an electrical carrier between conductors on electrochemical migration was investigated. The PCB pad was coated with OSP finish. Sn3.0Ag0.5Cu solder paste was printed on the PCB circuit and then the coupon was treated by reflow process. Thereby, specimen for ion migration test was fabricated. Electrochemical migration test was conducted under the condition of DC 48 V, $85^{\circ}C$, and 85 % relative humidity. Their life time could be increased about 22% by means of removal of flux. The fundamentals and mechanism of electrochemical migration was discussed depending on the existence of flux residues after reflow process.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2004.09a
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• pp.211-219
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• 2004

A new alloy definition will be presented concerning increasing demands for the board level reliability of miniaturized interconnections. The damage mechanism for LFBGA components on different board finishes is not quite understood. Further demands from mobile phones are the drop test, characterizing interface performance of different package constructions in relation to decreased pad constructions and therefore interfaces. The paper discusses the characterization of interfaces based on SnPb, SnPbXYZ, SnAgCu and SnAgCuInNd ball materials and SnAgCuInNd as solder paste, the stability after accelerated tests and the description of modified interfaces stric시y related to the assembly conditions, dissolution behavior of finishes on board side and the influence of intermetallic formation. The type of intermetallic as well as the quantity of intermetallics are observed, primaliry the hardness, E modules describing the ability of strain/stress compensation. First results of board level reliability are presented after TCT-40/+150. Improvement steps from the ball formulation will be discussed in conjunction to the implementation of lead free materials. In order to optimize ball materials for area array devices accelareted aging conditions like TCTs were used to analyze the board level reliability of different ball materials for BGA, LFBGA, CSP, Flip Chip. The paper outlines lead-free ball analysis in comparison to conventional solder balls for BGA and chip size packages. The important points of interest are the description of processability related to existing ball attach procedures, requirements of interconnection properties and the knowledge gained the board level reliability. Both are the primary acceptance criteria for implementation. Knowledge about melting characteristic, surface tension depend on temperature and organic vehicles, wetting behavior, electrical conductivity, thermal conductivity, specific heat, mechanical strength, creep and relaxation properties, interactions to preferred finishes (minor impurities), intermetallic growth, content of IMC, brittleness depend on solved elements/IMC, fatigue resistance, damage mechanism, affinity against oxygen, reduction potential, decontamination efforts, endo-/exothermic reactions, diffusion properties related to finishes or bare materials, isothermal fatigue, thermo-cyclic fatigue, corrosion properties, lifetime prediction based on board level results, compatibility with rework/repair solders, rework temperatures of modified solders (Impurities, change in the melting point or range), compatibility to components and laminates.

• Journal of the Korean Society for Precision Engineering
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• v.29 no.5
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• pp.563-571
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• 2012

In 3D integration package using TSV technology, bonding is the core technology for stacking and interconnecting the chips or wafers. During bonding process, however, warpage and high stress are introduced, and will lead to the misalignment problem between two chips being bonded and failure of the chips. In this paper, a finite element approach is used to predict the warpages and stresses during the bonding process. In particular, in-plane deformation which directly affects the bonding misalignment is closely analyzed. Three types of bonding technology, which are Sn-Ag solder bonding, Cu-Cu direct bonding and SiO2 direct bonding, are compared. Numerical analysis indicates that warpage and stress are accumulated and become larger for each bonding step. In-plane deformation is much larger than out-of-plane deformation during bonding process. Cu-Cu bonding shows the largest warpage, while SiO2 direct bonding shows the smallest warpage. For stress, Sn-Ag solder bonding shows the largest stress, while Cu-Cu bonding shows the smallest. The stress is mainly concentrated at the interface between the via hole and silicon chip or via hole and bonding area. Misalignment induced during Cu-Cu and Sn-Ag solder bonding is equal to or larger than the size of via diameter, therefore should be reduced by lowering bonding temperature and proper selection of package materials.

• Korean Journal of Metals and Materials
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• v.50 no.10
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• pp.775-783
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• 2012

The effect of thermal annealing on the in-situ growth characteristics of intermetallics (IMCs) and the mechanical strength of Cu pillar/Sn-3.5Ag microbumps are systematically investigated. The $Cu_6Sn_5$ phase formed at the Cu/solder interface right after bonding and grew with increased annealing time, while the $Cu_3Sn$ phase formed at the $Cu/Cu_6Sn_5$ interface and grew with increased annealing time. IMC growth followed a linear relationship with the square root of the annealing time due to a diffusion-controlled mechanism. The shear strength measured by the die shear test monotonically increased with annealing time. It then changed the slope with further annealing, which correlated with the change in fracture modes from ductile to brittle at a critical transition time. This is ascribed not only to the increasing thickness of brittle IMCs but also to the decreasing thickness of the solder, as there exists a critical annealing time for a fracture mode transition in our thin solder-capped Cu pillar microbump structures.

• Journal of the Microelectronics and Packaging Society
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• v.16 no.4
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• pp.5-8
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• 2009

In this paper, a high-quality low-temperature co-fired ceramic (LTCC) solenoid inductor using a solder ball and an air cavity on a silicon wafer for three-dimensional (3-D) system-in-package (SiP) is proposed. The LTCC multi-layer solenoid inductor is attached using Ag paste and solder ball on a silicon wafer with the air cavity structure. The air cavity is formed on a silicon wafer through an anisotropic wet-etching technology and is able to isolate the LTCC dielectric loss which is equivalent to a low k material effect. The electrical coupling between the metal layer and the LTCC dielectric layer is decreased by adopting the air cavity. The LTCC solenoid inductor using the solder ball and the air cavity on silicon wafer has an improved Q factor and self-resonant frequency (SRF) by reducing the LTCC dielectric resistance and parasitic capacitance. Also, 3-D device stacking technologies provide an effective path to the miniaturization of electronic systems.

• Resources Recycling
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• v.31 no.3
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• pp.61-72
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• 2022

We investigated the electrochemical behavior of Sn (93.0 %)-Ag (4.06 %)-Cu (0.89 %) during electrolysis of Pb-free solder waste to recover tin and silver. A thin strip of the solder waste produced by high-temperature melting and casting was used as a working electrode to perform electrochemical analysis. During anodic polarization, the current peak of an active region decreased with an increase in the concentration of sulfuric acid used as an electrolyte. This resulted in the electro-dissolution of the working electrode in the electrolyte (1.0 molL^-1 sulfuric acid) for a constant current study. The study revealed that the thickening of an anode slime layer at the working surface continuously increased the electrode potential of the working electrode. At 10 mAcm^-2, the dissolution reaction continued for 25 h. By contrast, at 50 mAcm^-2, a sharp increase in the electrode potential stopped the dissolution in 2.5 h. During dissolution, silver enrichment in the anode slime reached 94.3% in the 1 molL^-1 sulfuric acid electrolyte containing a 0.3 molL^-1 chlorine ion, which was 12.7% higher than that without chlorine addition. Moreover, the chlorine enhanced the stability of the dissolved tin ions in the electrolyte as well as the current efficiency of tin electro-deposition at the counter electrode.

• Journal of the Microelectronics and Packaging Society
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• v.7 no.3
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• pp.55-61
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• 2000

Sn-37Pb and Sn-3.5Ag-0.7Cu solder balls of 0.3 mm diameter were reflow soldered with the variation of soldering peak temperature and conveyer speed of reflow machine. The peak temperatures far soldering were changed in the range of 220~$240^{\circ}C$ for Sn-37Pb and 230~$260^{\circ}C$ for Sn-3.5Ag-0.7Cu. As the results of experiments, optimum soldering condition for Sn-37Pb was $230^{\circ}C$ of soldering temp., 0.7~0.8 m/min of conveyer speed. The optimum condition for the Sn-3.5Ag-0.7Cu was $250^{\circ}C$ and 0.6 m/min. The maximum shear strength for the soldered joints of Sn-37Pb was 555 gf and of Sn-3.5Ag-0.7Cu was 617 gf. Thickness of the intermetallic compound Cu6Sn5 on the soldered interface was 1.13~1.45 $\mu\textrm{m}$ for Sn-37Pb and 2.5~4.3 $\mu\textrm{m}$ for Sn-3.5Ag-0.7Cu.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2004.09a
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• pp.233-241
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• 2004

A new alloy definition will be presented concerning increasing demands for the board level reliability of miniaturized interconnections. The damage mechanism for LFBGA components on different board finishes is not quite understood. Further demands from mobile phones are the drop test, characterizing interface performance of different package constructions in relation to decreased pad constructions and therefore interfaces. The paper discusses the characterization of interfaces based on SnPb, SnPbXYZ, SnAgCu and SnAgCuInNd ball materials and SnAgCuInNd as solder paste, the stability after accelerated tests and the description of modified interfaces strictly related to the assembly conditions, dissolution behavior of finishes on board side and the influence of intermetallic formation. The type of intermetallic as well as the quantity of intermetallics are observed, primaliry the hardness, E modules describing the ability of strain/stress compensation. First results of board level reliability are presented after TCT-40/+150. Improvement steps from the ball formulation will be discussed in conjunction to the implementation of lead free materials In order to optimize ball materials for area array devices accelareted aging conditions like TCTs were used to analyze the board level reliability of different ball materials for BGA, LFBGA, CSP, Flip Chip. The paper outlines lead-free ball analysis in comparison to conventional solder balls for BGA and chip size packages. The important points of interest are the description of processability related to existing ball attach procedures, requirements of interconnection properties and the knowledge gained the board level reliability. Both are the primary acceptance criteria for implementation. Knowledge about melting characteristic, surface tension depend on temperature and organic vehicles, wetting behavior, electrical conductivity, thermal conductivity, specific heat, mechanical strength, creep and relaxation properties, interactions to preferred finishes (minor impurities), intermetallic growth, content of IMC, brittleness depend on solved elements/IMC, fatigue resistance, damage mechanism, affinity against oxygen, reduction potential, decontamination efforts, endo-/exothermic reactions, diffusion properties related to finishes or bare materials, isothermal fatigue, thermo-cyclic fatigue, corrosion properties, lifetime prediction based on board level results, compatibility with rework/repair solders, rework temperatures of modified solders (Impurities, change in the melting point or range), compatibility to components and laminates.

• Journal of the Microelectronics and Packaging Society
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• v.17 no.1
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• pp.81-88
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• 2010

Thermal annealing and electromigration test were performed at $150^{\circ}C$ and $4{\times}10^3\;A/cm^2$ conditions in order to investigate the effect of PCB surface finishs on the growth kinetics of intermetallic compound (IMC) in Sn-3.0Ag-0.5Cu solder bump. The surface finishes of the electrodes of printed circuit board (PCB) were organic solderability preservation (OSP), immersion Sn, and electroless Ni/immersion gold (ENIG). During thermal annealing, the OSP and immersion Sn show similar IMC growth velocity, while ENIG surface finish had much slower IMC growth velocity. Applying electric current accelerated IMC growth velocity and showed polarity effect due to directional electron flow.