• Proceedings of the KIPE Conference
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• 2018.11a
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• pp.171-172
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• 2018

본 논문에서는 NPC (Neutral-Point-Clamped) 인버터와 ANPC (Active Neutral-Point-Clamped) 인버터의 특성과 성능을 비교 분석한다. ANPC 인버터는 기존의 NPC 인버터와 비교하여 스위칭 부하를 분산시켜 발열의 불균형을 해소하고 소자 수명을 증가시킨다. 기존의 NPC 인버터 시스템과 ANPC 인버터에 대하여 이론적인 특징과 성능을 분석하고 모델링과 시뮬레이션을 통하여 비교 분석한다.

• Journal of Power Electronics
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• v.17 no.3
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• pp.653-663
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• 2017

Multilevel active neutral-point-clamped (ANPC) converter combines the advantages of three-level ANPC converter and multilevel flying capacitor (FC) converter. However, multilevel ANPC converter often suffers from capacitor voltage balancing problems. In order to solve the capacitor voltage balancing problems for five-level ANPC converter, phase-shifted pulse width modulation (PS-PWM) is used, which generally provides natural voltage balancing ability. However, the natural voltage balancing ability depends on the load conditions and converter parameters. In order to eliminate voltage deviations under steady-state and dynamic conditions, the active voltage-balancing control (AVBC) methods of floating capacitors and dc-link capacitors based on PS-PWM are proposed. First, the neutral-point current is regulated to balance the neutral-point voltage by injecting zero-sequence voltage. After that, the duty cycles of the redundant switch combinations are adjusted to balance the floating-capacitor voltages by introducing moderating variables for each of the phases. Finally, the effectiveness of the proposed AVBC methods is verified by experimental results.

• Journal of Power Electronics
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• v.15 no.1
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• pp.106-115
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• 2015

This paper proposes a novel direct power control (DPC) strategy for neutral-point-clamped (NPC) three-level rectifiers, to directly control the active power, the reactive power and the neutral point potential of the rectifiers by referring to three pre-calculated vector influence tables and minimizing an objective function. In the three vector influence tables, the influences of different voltage vectors on the active power, the reactive power and the neutral-point potential are shown explicitly. A conceptual description and control algorithm of the proposed controller are presented in this paper. Then, numerical simulations and experiments are carried out to validate the proposed method. Both the simulation and experimental results show that good performances during both the steady-state and transient operating conditions are achieved. As a result, the proposed strategy has been proven to be effective for NPC three-level rectifiers.

• Proceedings of the KIPE Conference
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• 2012.11a
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• pp.249-250
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• 2012

해상 풍력 발전은 가장 유망한 재생 에너지원의 하나이며, 육상 풍력 발전보다 풍력이 강력하고 일정하여 장시간 고출력 발생이 가능하다. 또한 소음, 공간적 한계, 경관훼손 등 기존 육상 풍력 발전의 단점을 보완하고 초대형 단지조성이 가능한 장점이 있다. 초대형 해상풍력단지에는 일반적으로 MW급의 해상풍력발전기가 사용된다. 본 논문에서는 MW급의 해상 풍력발전기에 ANPC(Active Neutral-Point-Clamped) Multi-Level VSC(Voltage Source Converter)를 적용하여 Back-to-Back으로 구성한 시스템을 제안하고 계통연계형 풍력 발전 시스템을 모의한 시뮬레이션을 통하여 제안된 시스템의 성능을 검증한다.

• The Transactions of the Korean Institute of Power Electronics
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• v.24 no.6
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• pp.459-462
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• 2019

This work presents methods for reducing overshoot voltages across the drain-source of silicon carbide (SiC) MOSFETs in grid-connected hybrid active neutral-point-clamped (ANPC) inverters. Compared with 3-level NPC-type inverter, the hybrid ANPC inverter can realize the high efficiency. However, SiC MOSFETs conduct its switching operation at high frequencies, which cause high overshoot voltages in such devices. These overshoot voltages should be reduced because they may damage switching devices and result in electromagnetic interference (EMI). Two major strategies are used to reduce the overshoot voltages, namely, adjusting the gate resistor and using a snubber capacitor. In this paper, advantages and disadvantages of these methods will be discussed. The effectiveness of these strategies is verified by experimental results.

• The Transactions of the Korean Institute of Power Electronics
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• v.22 no.2
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• pp.150-158
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• 2017

This study proposes a new pulse-width modulation switching pattern for the low conduction loss of a three-level neutral point clamped (NPC)-based dual-active bridge (DAB) converter. The operational principle for a bidirectional power conversion is a phase-shift modulation. The conventional switching method of the three-level NPC-based DAB converter shows a symmetric switching pattern. This method has a disadvantage of high root-mean-square (RMS) value of the coupling inductor current, which leads to high conduction loss. The proposed switching method shows an asymmetrical pattern, which can reduce the RMS value of the inductor current with lower conduction loss than that of the conventional method. The performance of the proposed asymmetrical switching method is theoretically analyzed and practically verified using simulation and experiment.

• Journal of IKEEE
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• v.24 no.1
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• pp.170-177
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• 2020

This paper presents an open-fault tolerance control method for active neutral point clamped (ANPC) inverter with high frequency/low frequency (HF/LF) modulation. By applying the ANPC inverter with SiC MOSFETs and Si IGBTs, the system efficiency and performance can be improved compared to a Si-based inverter. HF/LF modulation is used for a megawatt-scale inverter to minimize the commutation loop. The open-switch failure in megawatt-scale inverter causes severe damage to load and huge expenses when the inverter has been shut-down. The proposed tolerance control of open-switch failure provides continuous operation and improved reliability to the ANPC inverter. The effectiveness of the proposed fault tolerance control is verified by simulation results.

• Journal of Power Electronics
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• v.16 no.6
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• pp.2076-2084
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• 2016

In this paper, a novel scheme to eliminate common-mode voltage (CMV) is proposed for three-level neutral-point clamped (NPC) inverters. In the proposed scheme, a low-power full-bridge converter is utilized to produce compensatory voltage for CMV, which is injected into an NPC inverter through a single-phase four-winding transformer. With the proposed circuit, the power range for applications is not limited, and the maximum modulation index of the inverter is not reduced. These features are suitable for high-power medium-voltage machine drives. The effectiveness of the proposed method is verified by simulation and experimental results.

• Journal of Electrical Engineering and Technology
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• v.12 no.5
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• pp.1872-1882
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• 2017

Medium voltage drive systems driven by high-power multi-level inverters operating at low switching frequency can reduce the switching losses of the power device and increase the output power. Employing subsection synchronous current harmonic minimum pulse width modulation (CHMPWM) technique can maintain the total harmonic distortion of current at a very low level. It can also reduce the losses of the system, improve the system control performance and increase the efficiency of DC-link voltage accordingly. This paper proposes a subsection synchronous CHMPWM approach of active neutral point clamped five-level (ANPC-5L) inverter under low switching frequency operation. The subsection synchronous scheme is obtained by theoretical calculation based on the allowed maximum switching frequency. The genetic algorithm (GA) is adopted to get the high-precision initial values. So the expected switching angles can be achieved with the help of sequential quadratic programming (SQP) algorithm. The selection principle of multiple sets of the switching angles is also presented. Finally, the validity of the theoretical analysis and the superiority of the CHMPWM are verified through both the simulation results and experimental results.

• Journal of Power Electronics
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• v.15 no.2
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• pp.504-517
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• 2015

This paper presents a novel switching voltage model and an offset-based pulse width modulation (PWM) scheme for multilevel inverters with unbalanced DC sources. The switching voltage model under a DC voltage imbalance will be formulated in general form for multilevel neutral-point-clamped topologies. Analysis of the reference switching voltages from active and non-active switching voltage components in abc coordinates can enable voltage implementation for an unbalanced DC-source condition. Offset voltage is introduced as an indispensable variable in the switching voltage model for multilevel voltage-source inverters. The PWM performance is controlled through the design of two offset components in a subsequence. One main offset may refer to the common mode voltage, and the other offset restricts its effect on the quality of PWM control in related DC levels. The PWM quality can be improved as the switching loss is reduced in a discontinuous PWM mode by setting the local offset, which is related to the load currents. The validity of the proposed algorithm is verified by experimental results.