• 제목/요약/키워드: Active neutral-point clamped inverter

검색결과 17건 처리시간 0.061초

Active NPC 인버터의 모델링 및 성능 분석 (Performance Analysis of Active Neutral-Point-Clamped Inverter Systems)

  • 박흥석;이교범
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2018년도 추계학술대회
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    • pp.171-172
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    • 2018
  • 본 논문에서는 NPC (Neutral-Point-Clamped) 인버터와 ANPC (Active Neutral-Point-Clamped) 인버터의 특성과 성능을 비교 분석한다. ANPC 인버터는 기존의 NPC 인버터와 비교하여 스위칭 부하를 분산시켜 발열의 불균형을 해소하고 소자 수명을 증가시킨다. 기존의 NPC 인버터 시스템과 ANPC 인버터에 대하여 이론적인 특징과 성능을 분석하고 모델링과 시뮬레이션을 통하여 비교 분석한다.

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HF/LF 변조를 적용한 Active NPC 인버터의 개방 고장 허용 제어 (Open Switch Fault Tolerance Control of Active NPC Inverters With HF/LF Modulation)

  • 정원석;김예지;김석민;이교범
    • 전기전자학회논문지
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    • 제24권1호
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    • pp.170-177
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    • 2020
  • 본 논문은 HF/LF 변조 방법을 적용한 ANPC (active neutral point clamped) 인버터의 스위치 개방 고장에 대응하기 위한 허용 제어 방법을 제안한다. 기존 Si 기반 인버터에 비해 SiC MOSFET과 Si IGBT로 구성된 ANPC 인버터는 시스템의 효율이 높고 출력 품질이 우수하다. HF/LF 변조는 커뮤테이션 루프를 줄일 수 있어 MW 급 대용량 인버터를 위해 사용되는 변조 기법이다. MW 급 인버터의 스위치 개방 고장은 부하에 심각한 손상을 입히며, 인버터가 동작을 멈출 경우 막대한 경제적 손실을 야기한다. 제안하는 스위치 개방 고장의 허용 제어 기술은 ANPC 인버터의 지속적인 운전을 가능하게 하며 신뢰성을 향상 시킨다. 제안하는 기법의 성능은 시뮬레이션 결과를 통해 검증한다.

Common-Mode Voltage Elimination for Medium-Voltage Three-Level NPC Inverters Based on an Auxiliary Circuit

  • Le, Quoc Anh;Lee, Sangmin;Lee, Dong-Choon
    • Journal of Power Electronics
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    • 제16권6호
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    • pp.2076-2084
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    • 2016
  • In this paper, a novel scheme to eliminate common-mode voltage (CMV) is proposed for three-level neutral-point clamped (NPC) inverters. In the proposed scheme, a low-power full-bridge converter is utilized to produce compensatory voltage for CMV, which is injected into an NPC inverter through a single-phase four-winding transformer. With the proposed circuit, the power range for applications is not limited, and the maximum modulation index of the inverter is not reduced. These features are suitable for high-power medium-voltage machine drives. The effectiveness of the proposed method is verified by simulation and experimental results.

3-레벨 ANPC 인버터의 고장 허용 운전 시 중성점 전압 균형 제어 기법 (Neutral-Point Voltage Balancing Control Scheme for Fault-Tolerant Operation of 3-Level ANPC Inverter)

  • 이재운;김지원;박병건;노의철
    • 전력전자학회논문지
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    • 제24권2호
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    • pp.120-126
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    • 2019
  • This study proposes a neutral voltage balance control scheme for stable fault-tolerant operation of an active neutral point clamped (ANPC) inverter using carrier-based pulse width modulation. The proposed scheme maintains the neutral voltage balance by reconfiguring the switching combination and modulating the reference output voltage in order to solve the degradation of the output characteristic in the fault tolerant operation due to the fault of the power semiconductor switch constituting the ANPC inverter. The feasibility of the proposed control scheme is confirmed by HIL experiment using RT-BOX.

계통 연계형 Hybrid Active NPC 인버터의 SiC MOSFET 오버슈트 전압 저감 (Reducing Overshoot Voltage of SiC MOSFET in Grid-Connected Hybrid Active NPC Inverters)

  • 이덕호;김예지;김석민;이교범
    • 전력전자학회논문지
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    • 제24권6호
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    • pp.459-462
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    • 2019
  • This work presents methods for reducing overshoot voltages across the drain-source of silicon carbide (SiC) MOSFETs in grid-connected hybrid active neutral-point-clamped (ANPC) inverters. Compared with 3-level NPC-type inverter, the hybrid ANPC inverter can realize the high efficiency. However, SiC MOSFETs conduct its switching operation at high frequencies, which cause high overshoot voltages in such devices. These overshoot voltages should be reduced because they may damage switching devices and result in electromagnetic interference (EMI). Two major strategies are used to reduce the overshoot voltages, namely, adjusting the gate resistor and using a snubber capacitor. In this paper, advantages and disadvantages of these methods will be discussed. The effectiveness of these strategies is verified by experimental results.

Subsection Synchronous Current Harmonic Minimum Pulse Width Modulation for ANPC-5L Inverter

  • Feng, Jiuyi;Song, Wenxiang;Xu, Yuan;Wang, Fei
    • Journal of Electrical Engineering and Technology
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    • 제12권5호
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    • pp.1872-1882
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    • 2017
  • Medium voltage drive systems driven by high-power multi-level inverters operating at low switching frequency can reduce the switching losses of the power device and increase the output power. Employing subsection synchronous current harmonic minimum pulse width modulation (CHMPWM) technique can maintain the total harmonic distortion of current at a very low level. It can also reduce the losses of the system, improve the system control performance and increase the efficiency of DC-link voltage accordingly. This paper proposes a subsection synchronous CHMPWM approach of active neutral point clamped five-level (ANPC-5L) inverter under low switching frequency operation. The subsection synchronous scheme is obtained by theoretical calculation based on the allowed maximum switching frequency. The genetic algorithm (GA) is adopted to get the high-precision initial values. So the expected switching angles can be achieved with the help of sequential quadratic programming (SQP) algorithm. The selection principle of multiple sets of the switching angles is also presented. Finally, the validity of the theoretical analysis and the superiority of the CHMPWM are verified through both the simulation results and experimental results.

Active NPC 인버터를 적용한 계통연계 전력변환 시스템의 제어 (Control of Grid-Connected Power Conversion Systems using an Active NPC Inverter)

  • 김성원;서동우;이교범
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2018년도 추계학술대회
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    • pp.155-156
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    • 2018
  • This paper presents a control method for grid-connected Active-NPC inverter systems. NPC (Neutral Point Clamped) is widely used in power conversion systems. NPC has a loss of switching elements and voltage imbalance. Active NPC has been proposed to overcome these drawbacks. ANPC changed the neutral diode to IGBT to reduce the switching loss. This paper modeled a grid-connected Acitve-NPC inverter systems and analyzed its performance. DSOGI PLL was used as a phase control method for precise control of grid link voltage. The proposed method is verified by PSIM simulation.

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Switching Voltage Modeling and PWM Control in Multilevel Neutral-Point-Clamped Inverter under DC Voltage Imbalance

  • Nguyen, Nho-Van;Nguyen, Tam-Khanh Tu;Lee, Hong-Hee
    • Journal of Power Electronics
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    • 제15권2호
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    • pp.504-517
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    • 2015
  • This paper presents a novel switching voltage model and an offset-based pulse width modulation (PWM) scheme for multilevel inverters with unbalanced DC sources. The switching voltage model under a DC voltage imbalance will be formulated in general form for multilevel neutral-point-clamped topologies. Analysis of the reference switching voltages from active and non-active switching voltage components in abc coordinates can enable voltage implementation for an unbalanced DC-source condition. Offset voltage is introduced as an indispensable variable in the switching voltage model for multilevel voltage-source inverters. The PWM performance is controlled through the design of two offset components in a subsequence. One main offset may refer to the common mode voltage, and the other offset restricts its effect on the quality of PWM control in related DC levels. The PWM quality can be improved as the switching loss is reduced in a discontinuous PWM mode by setting the local offset, which is related to the load currents. The validity of the proposed algorithm is verified by experimental results.

Common-Mode Voltage Elimination with an Auxiliary Half-Bridge Circuit for Five-Level Active NPC Inverters

  • Le, Quoc Anh;Park, Do-Hyeon;Lee, Dong-Choon
    • Journal of Power Electronics
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    • 제17권4호
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    • pp.923-932
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    • 2017
  • This paper proposes a novel scheme which can compensate the common-mode voltage (CMV) for five-level active neutralpoint clamped (5L-ANPC) inverters, which is based on modifying the space vector pulse width modulation (SVPWM) and adding an auxiliary leg to the inverter. For the modified SVPWM, only the 55 voltage vectors producing low CMV values among the 125 possible voltage vectors are utilized, which varies over the three voltage levels of $-V_{dc}/12$, 0 V, and $V_{dc}/12$. In addition, the compensating voltage, which is injected into the 5L-ANPC inverter system to cancel the remaining CVM through a common-mode transformer (CMT) is generated by the additional NPC leg. By the proposed method, the CMV of the inverter is fully eliminated, while the utilization of the DC-link voltage is not decreased at all. Furthermore, all of the DC-link and flying capacitor voltages of the inverter are well controlled. Simulation and experimental results have verified the validity of the proposed scheme.

Active NPC 인버터의 손실 분배 제어를 위한 뉴턴의 냉각법칙 기반의 간단한 열 모델링 기법 (Convenient Thermal Modeling for Loss Distribution method of 3-Level Active NPC Inverter using Newton's Law of cooling)

  • 현승욱;이정효;원충연
    • 조명전기설비학회논문지
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    • 제29권9호
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    • pp.71-80
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    • 2015
  • This paper proposes a convenient thermal modeling method for loss distribution control method of 3-level Active NPC(Neutral Point Clamped) inverter. In the drawback of conventional 3-level NPC, the generated losses can occur unbalance in each switching device, as a result, thermal utilization of designed system has been decreased. In order to compensate unbalanced losses, Active NPC inverter performed loss balancing control with thermal modeling during operation of each switching device. Therefore, this paper deals with a convenient thermal modeling method based on newton's law of cooling rather than conventional thermal modeling method. Both simulation and experimental results based on 10kW 3-level Active NPC inverter confirm the validity of the analysis performed in the study.