• Title/Summary/Keyword: Access 응용프로그램

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Design of Synchronous 256-bit OTP Memory (동기식 256-bit OTP 메모리 설계)

  • Li, Long-Zhen;Kim, Tae-Hoon;Shim, Oe-Yong;Park, Mu-Hun;Ha, Pan-Bong;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.7
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    • pp.1227-1234
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    • 2008
  • In this paper is designed a 256-bit synchronous OTP(one-time programmable) memory required in application fields such as automobile appliance power ICs, display ICs, and CMOS image sensors. A 256-bit synchronous memory cell consists of NMOS capacitor as antifuse and access transistor without a high-voltage blocking transistor. A gate bias voltage circuit for the additional blocking transistor is removed since logic supply voltage VDD(=1.5V) and external program voltage VPPE(=5.5V) are used instead of conventional three supply voltages. And loading current of cell to be programmed increases according to RON(on resistance) of the antifuse and process variation in case of the voltage driving without current constraint in programming. Therefore, there is a problem that program voltage can be increased relatively due to resistive voltage drop on supply voltage VPP. And so loading current can be made to flow constantly by using the current driving method instead of the voltage driving counterpart in programming. Therefore, program voltage VPP can be lowered from 5.9V to 5.5V when measurement is done on the manufactured wafer. And the sens amplifier circuit is simplified by using the sens amplifier of clocked inverter type instead of the conventional current sent amplifier. The synchronous OTP of 256 bits is designed with Magnachip $0.13{\mu}m$ CMOS process. The layout area if $298.4{\times}314{\mu}m2$.

Low-Power Cache Design by using Locality Buffer and Address Compression (지역 버퍼와 주소 압축을 통한 저전력 캐시 설계)

  • Kwak, Jong Wook
    • Journal of the Korea Society of Computer and Information
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    • v.18 no.9
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    • pp.11-19
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    • 2013
  • Most modern computer systems employ cache systems in order to alleviate the access time gap between processor and memory system. The power dissipated by the cache systems becomes a significant part of the total power dissipated by whole microprocessor chip. Therefore, power reduction in the cache system becomes one of the important issues. Partial tag cache is the system for the least power consumption. The main power reduction for this method is due to the use of small partial tag matching, not full tag matching. In this paper, we first analyze the previous regular partial tag cache systems and propose a new address matching mechanism by using locality buffer and address compression. In simulation results, the proposed model shows 18% power reduction in average, still providing same performance level, compared to regular cache.

Post-purchase Customer Choice Model for Subscription-based Information and Telecommunications Services (가입형 정보통신 서비스의 구매 후 고객선택모형)

  • Lee, Dong-Joo;Ryu, Ho-Chul;Ahn, Jae-Hyeon
    • Information Systems Review
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    • v.8 no.1
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    • pp.159-179
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    • 2006
  • With the advances in information technologies and the wide acceptance of IT outsourcing practices, subscription-based information & telecommunications services(ITS) become more available. Convergence and intensified industry competition have made it an imperative for the ITS providers to keep their current customers and acquire new customers at the same time. In this study, we developed a framework for effective customer management based on the factors influencing the post-purchase customer choice: stay with the present provider or switch to another one. Specifically, we classified the factors into four categories: Holding factors, Defect factors, Inducement factors, and Hurdle factors depending on the characteristics of the influence and direction of the influence. Based on the classification, we developed a post-purchase customer choice model for the subscription-based ITS providers. Then, we illustrated a possible application of the model in the context of the broadband Internet access service. The model could be used to increase the competitive advantage of service providers through the effective customer management in the subscription-based ITS market.

Analysis of the 3D Data Model and Development of an Application for Landslide Region Information Service (연산사태 지역정보 서비스를 위한 3차원 데이터 모델 분석 및 Application 개발)

  • Kim, Dong-Moon;Park, Jae-Kook;Yang, In-Tae;Choi, Seung-Pil
    • Journal of Korean Society for Geospatial Information Science
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    • v.18 no.3
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    • pp.11-19
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    • 2010
  • In recent years, Korea has witnessed an increase to natural disasters such as landslides due to localized sudden and intensive rainfalls. Thus there have been researches on surface displacements to detect and monitor displacements in the areas prone to landslides by using high-precision and density numerical elevation data from LiDAR, which is an advanced 3D measuring equipment. However, the commercial software to process large-capacity LiDAR data, is expensive and difficult to be applied to specialized tasks such as analysis of landslide. In addition, there are no measures for many users to easily access diverse spatial information related to landslides and put it to intuitive uses. Thus this study developed an application program to analyze landslides by processing time series LiDAR data and intuitively serve many users with information about the topography and landslides of given areas. It analyzed the current state of landslides in the subject region through case study and proposed that 3D-based landslide and topography information can be served intuitively.

Multi-resolution Representation of 2D Point Data (2차원 점 데이터의 다중해상도 표현)

  • Yun, Seong-Min;Lee, Mun-Bae;Park, Sang-Hun
    • Journal of KIISE:Computing Practices and Letters
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    • v.16 no.7
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    • pp.768-774
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    • 2010
  • Reconstruction of implicit surfaces from scattered point data sets have been developed in various engineering and scientific studies. In this paper, we represent a method to construct functions of 2D point data using multi-scale kernels and show it can be applied to graphics applications needed to access data in real-time. Our approach is similar to previous work in that a set of coefficients of the functions are calculated and stored in the preprocessing stage and function values at arbitrary positions are evaluated for real-time applications, however, it is different from others in that users can choose detail levels freely in real-time processing stage. The reason why the functions implicitly supports multi-resolution results from the mathematical properties of multi-scale kernels, and proposed method can be expanded to represent multi-resolution functions of n-dimensional data.

Design and Implementation of RFID-based Airway Logistics System for Ubiquitous Environments (유비쿼터스 환경을 위한 RFID 기반의 항공 물류 시스템의 설계 및 구현)

  • Jang, Sung-Ho;Ma, Yong-Beom;Noh, Chang-Hyeon;Park, Yang-Jae;Kim, Kyo-Hyeon;Cha, Heung-Suk;Lee, Jong-Sik;Kim, Jea-Moung
    • Journal of the Korea Society of Computer and Information
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    • v.12 no.6
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    • pp.297-306
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    • 2007
  • Bar-code based airway logistics systems have many problems like freight loss and data management error due to semiskilled air-cargo process and individual information system. To solve these problems, this paper analyzed how to process an air-cargo practically and designed and implemented the RFID-based airway logistics system. This system has an information service system which manages data from RFID systems in realtime and provides a communication interface for data sharing. And, this system precesses data queries from capture applications and access applications to provide various services to users such as the freight track and trace service. Also, this system includes a H/H reader agent to integrate existing bar-cord systems. It allows us to realize automation and information-oriented air-cargo process and achieve improvement of air-cargo services with reduction of freight loss and management error.

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A Study on Implementation for Wireless Gas Sensor Data Transmission Platform using ARM11 and Linux (ARM11 과 Linux 기반의 무선 가스 센서 데이터 전송용 플랫폼 구현)

  • Sun, Hee-Gab;Kim, Young-Kil
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.5
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    • pp.1022-1029
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    • 2009
  • What Ubiquitous means "being or existing anywhere, anytime"in Latin, which is, in other words, the users are able to access the network no matter where they are, what kind of network or computer terminals they use. This paper focuses on the implementation of hardware system. The first part of the sytem is the sensor node which transmits the sensor data from node to ARM11 platform through the Zigbee network wirelessly. The other part of the system is the ARM11 platform which receives and displays the sensor data. ARM11 platform is sink node. The ARM11 platform is based on ARM11 architecture and ported with Linux OS. Qtopia is used as Window Manager in order to make applications. The highly efficient ARM11 processor, S3C6400 MPC is the main part of the ARM11 platform.

High Speed Implementation of LEA on ARMv8 (ARMv8 상에서 LEA 암호화 고속 구현)

  • Seo, Hwa-jeong
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.21 no.10
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    • pp.1929-1934
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    • 2017
  • Lightweight block cipher (Lightweight Encryption Algorithm, LEA), is the most promising block cipher algorithm due to its efficient implementation feature and high security level. The LEA block cipher is widely used in real-field applications and there are many efforts to enhance the performance of LEA in terms of execution timing to achieve the high availability under any circumstances. In this paper, we enhance the performance of LEA block cipher, particularly on ARMv8 processors. The LEA implementation is optimized by using new SIMD instructions namely NEON engine and 24 LEA encryption operations are simultaneously performed in parallel way. In order to reduce the number of memory access, we utilized the all NEON registers to retain the intermediate results. Finally, we evaluated the performance of the LEA implementation, and the proposed implementations on Apple A7 and Apple A9 achieved the 2.4 cycles/byte and 2.2 cycles/byte, respectively.

Configuration Management for Multi-Level Security Information Technology Systems (IT 시스템의 다중 수준 보안을 위한 관리 환경 연구)

  • Kim, Jeom-Goo
    • Convergence Security Journal
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    • v.10 no.4
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    • pp.39-48
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    • 2010
  • In a complex, secure IT system environment there will be groups of data that be segregated from one another, yet reside on the same system. Users of the system will have varying degrees of access to specific data. The Configuration Management(CM) of the information architecture, the physical architecture, user privileges and application security policies increases the complexity for operations, maintenance and security staff. This pager describes(current work to merge the capabilities of a network CM toll with those of a Computer Aided System Engineering(CASE) tool. The rigour of Systems Engineering(SE) modelling techniques can be used to deal with the complexities of multi-level information security. The SE logical and physical models of the same system are readily tailorable to document the critical components of both the information architecture and physical architecture that needs to be managed. Linking a user-friendly, physical CM tool with the extended capabilities of a CASE tool provide the basis for improved configuration management of secure IT systems.

Register Pressure Aware Code Selection Algorithm for Multi-Output Instructions (Register Pressure를 고려한 다중 출력 명령어를 위한 개선된 코드 생성 방법)

  • Youn, Jong-Hee M.;Paek, Yun-Heung;Ko, Kwang-Man
    • The KIPS Transactions:PartA
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    • v.19A no.1
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    • pp.45-50
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    • 2012
  • The demand for faster execution time and lower energy consumption has compelled architects of embedded processors to customize it to the needs of their target applications. These processors consequently provide a rich set of specialized instructions in order to enable programmers to access these features. Such an instruction is typically a $multi$-$output$ $instruction$ (MOI), which outputs multiple results parallely in order to exploit inherent underlying hardware parallelism. Earlier study has exhibited that MOIs help to enhance performance in aspect of instruction counts and code size. However the earlier algorithm does not consider the register pressure. So, some selected MOIs introduce register spill/reload code that increases the code size and instruction count. To attack this problem, we introduce a novel iterated instruction selection algorithm based on the register pressure of each selected MOIs. The experimental results show the suggested algorithm achieves 3% code-size reduction and 2.7% speed-up on average.