• Journal of the Korean Institute of Telematics and Electronics S
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• v.34S no.8
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• pp.45-55
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• 1997

To design a ATM Switch which ahs advantages in high sped packet switching, it is essential to set multiple paths between input ports and output ports and to design a new packet transfer technique on that paths for decreasing Packet Loss by conflicts in internal Switch Plane. We propose new packet transfer method, Alternate Path Transfer Mechanism by Dynamic Bypass Transfer Method which can solve conflict problem in Banyan network easily. Proposed ATM Switch consists of Banyan networks, Input/Ouput Port, Bypass Link, and Bypass Link Controller. Packets caused conflicts in SEs have another chances of packet transfer over alternate switching planes by using this mechanism.

• Journal of the Korea Society of Computer and Information
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• v.9 no.4 s.32
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• pp.173-178
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• 2004

A network of Asynchronous Transfer Mode (ATM) will be required to carry the traffics(CVR, VBR, UBR. ABR) generated by a wide range of services ATM services the Quality-of-Service (QoS) management of traffice sources and bandwidth. Besides efficiency and throughput, the security services are achieved in the traffic sent in ATM network. In this paper, the scheduler evaluate and the packets sent in ATM security group. The scheduler transmits the safty packet, drop the unsafty packet and evaluate mark packet as the requirement of the delay. In this paper, we propose the scheduling algorithm of mark packet which evaluates the packet. The suggested model performance of the firewall switch is estimate simulation in terms of the delay by computer.

• Journal of the Korean Institute of Telematics and Electronics T
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• v.35T no.2
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• pp.35-38
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• 1998

We need the packet transmission of voice, data and video according to the development of ATM technology and packet network. In ATM, packet is parted to the constant length data, we called cell, the method is needed to minimize data loss. Because over ATM, we discard error cell without correction in transmission. So, about video, there is layered coding method. We simulated the coding using wavelet transform, which is structurally layed coded, so need not the additional coder.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.10B
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• pp.1852-1860
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• 1999

This paper studied performance of the AAL2 for variable rate real time services in ATM network with discrete-time simulation model. In this simulation, input parameters are packet fill delay for AAL2 PDU generation, guard time for ATM cell generation, burstness and number of channels. Though variation of the above mentioned parameters, we obtained end-to end delay variations and throughput, analyzed performance effect of the each parameter for voice packet service.

• The Journal of the Acoustical Society of Korea
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• v.16 no.6
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• pp.48-53
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• 1997

The multicasting of MCS(Multicast Server) requires a effective traffic control scheme to prevent buffer overflow on ATM subnetworks. This paper considers MCS multicasting to TCP packets, and propose EPD + SPD scheme(Early Packet Discard-same Source Packet Discard) using common buffer. When the threshold of output buffer is reached, MCS drops an entire packet prior to buffer overflow, so that corrupted packets will not be transmitted by the server. And SPD scheme show that the EPD + SPD results in higher TCP throughput than that of tail drop and EPD + DFF.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.11C
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• pp.1171-1177
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• 2002

In this paper, we proposed a high speed IP(Internet Protocol) packet forwarding engine of ATM(Asynchronous Transfer Mode) based label edge routers for POS(Packet over SONET) interface. The forwarding engine uses TCAM(Ternary Content Addressable Memory) for high performance lookup processing of the packet received from POS interface. We have accomplished high speed IP packet forwarding in hardware by implementing the functions of high speed IP header Processing and lookup control into FPGA(Field Programmable Gate Array). The proposed forwarding engine has the functions of label edge routers as the lookup controller supports MPLS(Multiprotocol Label Switching) packet processing functionality.

• Journal of Navigation and Port Research
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• v.27 no.3
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• pp.283-288
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• 2003

Recently, the growth of applications and services over high-speed Internet increases, ATM networks as wide area back-bone has been a major solution. As the conventional TCP/IP suite is still the standard protocol used to support upper application on current. Internet, the issues regarding whether TCP/IP will operate efficiently on top of an ATM infrastructure and how to control its QoS still remain for studies. TCP uses a window-based protocol for flow control in the transport layer. When TCP uses the UBR service in ATM layer, the control method is only buffer management. If a cell is discarded in ATM layer, one whole packet of TCP will be lost; this fact occur the most TCP performance degradation. Several dropping strategies, such as Tail Drop, EPD, PPD, SPD, FBA, have been proposed to improve the TCP performance over ATM. In this paper, to improve the TCP performance, we propose a packet dropping scheme that is based on comparison with EPD, SPD and FBA. Our proposed scheme is applied to schemes discussed in the previous technology. Our proposed scheme does not need to know each connection's mean packet size. When the buffer exceeds the given threshold, it is based on comparison between the number of dropped packet and the approved packet. Our results are reported and discussed for comparing these discarding schemes under similar conditions. Although the number of virtual channel (VC) is increased, the simulation results showed that the proposed scheme can allocate more fairly each VC than other scheme.

• Journal of the Korea Society of Computer and Information
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• v.8 no.3
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• pp.100-106
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• 2003

This paper presents the design of a value-added ATM switch. The ATM switch ca perform CAC Processing and Firewall Processing Routine at packet-level (IP) at the ATM environment per port. The proposed two routine are integrated into the components of ATM switch. The Firewall switch employs a suggested two routine model to avoid or reduce the latency caused by filtering. Also, we suggest four classes are defined. namely, classes A, B, C, and D, which are orded from the safest to the most dangerous. The suggested model performance of ATM Firewall switch is estimated simulation in terms of the throught and latency by computer.

• Proceedings of the Korea Multimedia Society Conference
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• 2000.04a
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• pp.17-21
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• 2000

TCP 프로토콜과 ATM 프로토콜과의 형태 및 제어방식의 차이로 인한 이질성 문제 때문에 ATM 층에서 한 개의 셀 손실은 상위 TCP층에서 하나의 패킷 손실을 초래하게 되어 망에 대한 충분한 QoS를 제공하지 못한다. 이러한 문제들을 해결하기 위해 처리율면에서 Early Packet Discard(EPD)와 공정성면에서 Selective Packet Discard(SPD), Fair Buffer Allocation (FBA) 등이 제안되었다. 본 논문에서는 ATM상에서 TCP 성능성향을 위해 기존의 알고리즘과 제안한 알고리즘에 대하여 비교분석하고 , VC의 수를 가변적으로 변화시켜도 제안한 알고리즘은 SPD나 FBA보다 나은 공정성을 보였고, 처리율면에서는 차이가 없음을 시뮬레이션결과를 통해 나타내었다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.11C
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• pp.1164-1170
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• 2002

In the ACE2000 MPLS system, MPLS Interface Module(MIM) is composed of an ATM Interface Module and a HFMA performing a packet forwarding. In the MIM, the HFMA RSAR receive cells from the Physical layer and reassemble the cells. And the IP Lookup controller perform a packet forwarding after packet classification. Forwarded packet is segmented into cells in the HFMA TSAR and transfer to the ALMA for the transmission to an ATM cell switch. When the MIM make use of an ATM Interface Module, it directly connect the ALMA with a PHY layer using the UTOPIA Level2 interface. Then, an ALMA performs Master Mode. Also, the HFMA TSAR performs the Master Mode in the MIM. Therefore, the UTOPIA-L2 Controller of the Slave Mode require for interfacing between an ALMA and a HFHA TSAR. In this paper, we implement the architecture and cell control mechanism for the UTOPIA-L2 Controller supporting Multi-ports.