• Title/Summary/Keyword: AS-level topology

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Multi-Level Inverter Circuit Analysis and Weight Reduction Analysis to Stratospheric Drones (성층권 드론에 적용할 멀티레벨 인버터 회로 분석 및 경량화 분석)

  • Kwang-Bok Hwang;Hee-Mun Park;Hyang-Sig Jun;Jung-Hwan Lee;Jin-Hyun Park
    • Journal of the Korean Society of Industry Convergence
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    • v.26 no.5
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    • pp.953-965
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    • 2023
  • The stratospheric drones are developed to perform missions such as weather observation, communication relay, surveillance, and reconnaissance at 18km to 20km, where climate change is minimal and there is no worry about a collision with aircraft. It uses solar panels for daytime flights and energy stored in batteries for night flights, providing many advantages over existing satellites. The electrical and power systems essential for stratospheric drone flight must ensure reliability, efficiency, and lightness by selecting the optimal circuit topology. Therefore, it is necessary to analyze the circuit topology of various types of multi-level inverters with high redundancy that can ensure the reliability and efficiency of the motor driving power required for stable long-term flight of stratospheric drones. By quantifying the switch element voltage drop and the number and weight of inverter components for each topology, we evaluate efficiency and lightness and propose the most suitable circuit topology for stratospheric drones.

A Study on the Characteristics of Topological Invariant Expression in the Space of Digital Architecture (디지털건축공간에 나타난 위상기하학적 불변항의 표현특성에 관한 연구)

  • Bae Kang-Won;Park Chan-Il
    • Korean Institute of Interior Design Journal
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    • v.14 no.3 s.50
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    • pp.64-72
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    • 2005
  • The purpose of this study is to propose a topological design principles and to analyze the space of digital architecture applying topological invariant expressive characteristics. As this study is based on topology as a science of true world's pattern, we intented to explain the concepts and provide some methods of low-level and hyperspace topological invariant Properties. Four major aspects are discussed. Those are connection theory, boundary concept, homotopy group, knot Pattern theory as topological invariant properties. Then we intented to make understand topological characteristics of the Algorithms, luring machine, cellular automata, string theory, membrane, DNA and supramolecular chemistry. In fine, the topological invariant properties of the digital architecture as genetic algorithms based on self-organization and heterogeneous networks of interacting actors can be analyzed and used as a critical tool. Therefore topology can be provided endless possibilities for architecture, designers and scientists intended in expressing the more complex and organic patterns of nature as life.

Development of a Blended Learning Model using Differentiated Learning Pattern (수준별 학습 패턴을 적용한 블랜디드 러닝 모형의 개발)

  • Kim, Yong-Beom
    • The Journal of the Korea Contents Association
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    • v.10 no.3
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    • pp.463-471
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    • 2010
  • The purpose of this study is to articulate learning model based on achievement level in blended learning environment. In order to investigate the variables and mechanisms in the blended learning environment, we started by attempt to develop two questionnaires using the components of web-based instruction and self-regulated learning. And its results were implemented to represent the topology and directed merging path within components. 154 students at a high school were required to take each web course respectively for two weeks. And questionnaires data, achievement levels data were collected and analyzed. Various statistical analysis methods such as correlation analysis, classical multidimensional scaling, multiple regression analysis, were applied to the data. As an result, the topology and directed path within factors of blended learning process were derived and revised as a final model.

Wavelet-Based Level-of-Detail Representation of 3D Objects (웨이브릿 기반의 3차원 물체 LOD 표현)

  • Lee, Ha-Sup;Yang, Hyun-Seung
    • Journal of KIISE:Computer Systems and Theory
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    • v.29 no.4
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    • pp.185-191
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    • 2002
  • In this paper, we propose a 3D object LOD(Level of Detail) modeling system that constructs a mesh from range images and generates the mesh of various LOD using the wavelet transform. In the initial mesh generation, we use the marching cube algorithm. We modify the original algorithm to apply it to construct the mesh from multiple range images efficiently. To get the base mesh we use the decimation algorithm which simplifies a mesh with preserving the topology Finally, when reconstructing new mesh which is similar to initial mesh we calculate the wavelet coefficients by using the wavelet transform. We solve the critical problem of wavelet-based methods - the surface crease problem (1) - by using the mesh simplification as the base mesh generation method.

Single Phase 5-level Inverter with DC-link Switches (DC링크 스위치를 갖는 단상 5레벨 인버터)

  • Choi, Young-Tae;Sun, Ho-Dong;Park, Min-Young;Kim, Heung-Geun;Chun, Tea-Won;Nho, Eui-Cheol
    • The Transactions of the Korean Institute of Power Electronics
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    • v.16 no.3
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    • pp.283-292
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    • 2011
  • This paper proposed a new multi-level inverter topology based on a H-bridge with two switches and two diodes connected to the DC-link. The output voltage of the proposed topology is quite closer to a sinusoidal waveform compared with a typical single phase inverter. The proposed multi-level inverter is applicable to a power conditioning system for renewable energy sources, and it can be also used as a building block of a cascaded multi-level inverter for a high voltage application. In case of conventional H-bridge type or NPC type multi-level inverter, 8 controllable switches are used to obtain a 5 level output voltage, but the proposed multi-level inverter requires only 6 controllable switches. Thus the circuit configuration is quite simple, reliable and cost-effective implementation is possible. The efficiency can be improved owing to the reduction of the switching loss. A new PWM method based on POD modulation is suggested which requires only one carrier signal. The switching sequence to make the capacitor voltage balanced is also considered. The feasibility is studied through simulation and experiment.

Step-up Switched Capacitor Multilevel Inverter with a Cascaded Structure in Asymmetric DC Source Configuration

  • Roy, Tapas;Bhattacharjee, Bidrohi;Sadhu, Pradip Kumar;Dasgupta, Abhijit;Mohapatra, Srikanta
    • Journal of Power Electronics
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    • v.18 no.4
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    • pp.1051-1066
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    • 2018
  • This study presents a novel step-up switched capacitor multilevel inverter (SCMLI) structure. The proposed structure comprises 2 unequal DC voltage sources, 4 capacitors, and 14 unidirectional power switches. It can synthesize 21 output voltage levels. The important features of the proposed topology are its self-voltage boosting and inherent capacitor voltage balancing capabilities. Furthermore, a cascaded structure of the proposed SCMLI with an asymmetric DC voltage source configuration is presented. The proposed topology and its cascaded structure are compared with conventional and other recently developed topologies in terms of different aspects, such as the required components to produce a specific number of output voltage levels, the total standing voltage (TSV) and peak inverse voltage of the structure, and the maximum number of switches in the conducting path. Furthermore, a cost function is developed to verify the cost-effectiveness of the proposed topology with respect to other topologies. The TSV of the proposed topology is significantly lower than those of other topologies. Moreover, the developed topology is cost-effective compared with other topologies. A detailed operating principle, power loss analysis, and selection procedure for switched capacitors are presented for the proposed SCMLI structure. Extensive simulation and experimental studies of a 21-level inverter structure prove the effectiveness and merits of the proposed SCMLI.

An Energy-Efficient Self-organizing Hierarchical Sensor Network Model for Vehicle Approach Warning Systems (VAWS) (차량 접근 경고 시스템을 위한 에너지 효율적 자가 구성 센서 네트워크 모델)

  • Shin, Hong-Hyul;Lee, Hyuk-Joon
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.7 no.4
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    • pp.118-129
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    • 2008
  • This paper describes an IEEE 802.15.4-based hierarchical sensor network model for a VAWS(Vehicle Approach Warning System) which provides the drivers of vehicles approaching a sharp turn with the information about vehicles approaching the same turn from the opposite end. In the proposed network model, a tree-structured topology, that can prolong the lifetime of network is formed in a self-organizing manner by a topology control protocol. A simple but efficient routing protocol, that creates and maintains routing tables based on the network topology organized by the topology control protocol, transports data packets generated from the sensor nodes to the base station which then forwards it to a display processor. These protocols are designed as a network layer extension to the IEEE 802.15.4 MAC. In the simulation, which models a scenario with a sharp turn, it is shown that the proposed network model achieves a high-level performance in terms of both energy efficiency and throughput simultaneously.

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Finite Control Set Model Predictive Current Control for a Cascaded Multilevel Inverter

  • Razia Sultana, W.;Sahoo, Sarat Kumar
    • Journal of Electrical Engineering and Technology
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    • v.11 no.6
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    • pp.1674-1683
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    • 2016
  • In this paper, a Finite Control Set Model Predictive Control (FCS-MPC) for a five level cascaded multilevel inverter (CMLI) with reduced switch topology is proposed. Five switches are used here instead of conventionally used eight switches. The main contribution of this paper is to make the MPC controller work for the reduced switch topology using only 19 voltage vectors in place of conventional 61 voltage vectors for a five level CMLI. This simplifies the execution of the MPC algorithm, paving a way for the significant reduction in the computational time. The controller makes use of the excellent ability of MPC to multitask, by adding one more objective which is to reduce the average switching frequency in addition to controlling the load current. This is especially important, since switching losses and therefore switching frequency is significant for high-power applications. The trade-off of this MPC is that the current is not as smooth as the 61 vector scheme, but well within the limits of IEEE standards. The results shown prove that this MPC works well in steady state and dynamic conditions too.

THERA: Two-level Hierarchical Hybrid Road-Aware Routing for Vehicular Networks

  • Abbas, Muhammad Tahir;SONG, Wang-Cheol
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.13 no.7
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    • pp.3369-3385
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    • 2019
  • There are various research challenges in vehicular ad hoc networks (VANETs) that need to be focused until an extensive deployment of it becomes conceivable. Design and development of a scalable routing algorithm for VANETs is one of the critical issue due to frequent path disruptions caused by the vehicle's mobility. This study aims to provide a novel road-aware routing protocol for vehicular networks named as Two-level hierarchical Hybrid Road-Aware (THERA) routing for vehicular ad hoc networks. The proposed protocol is designed explicitly for inter-vehicle communication. In THERA, roads are distributed into non-overlapping road segments to reduce the routing overhead. Unlike other protocols, discovery process does not flood the network with packet broadcasts. Instead, THERA uses the concept of Gateway Vehicles (GV) for the discovery process. In addition, a route between source and destination is flexible to changing topology, as THERA only requires road segment ID and destination ID for the communication. Furthermore, Road-Aware routing reduces the traffic congestion, bypasses the single point of failure, and facilitates the network management. Finally yet importantly, this paper also proposes a probabilistical model to estimate a path duration for each road segment using the highway mobility model. The flexibility of the proposed protocol is evaluated by performing extensive simulations in NS3. We have used SUMO simulator to generate real time vehicular traffic on the roads of Gangnam, South Korea. Comparative analysis of the results confirm that routing overhead for maintaining the network topology is smaller than few previously proposed routing algorithms.

Optimal Topologies for Cascaded Sub-Multilevel Converters

  • Babaei, Ebrahim
    • Journal of Power Electronics
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    • v.10 no.3
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    • pp.251-261
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    • 2010
  • The general function of a multilevel converter is to synthesize a desired output voltage from several levels of dc voltages as inputs. In order to increase the steps in the output voltage, a new topology is recommended in [1], which benefits from a series connection of sub-multilevel converters. In the procedure described in this reference, despite all the advantages, it is not possible to produce all the steps (odd and even) in the output. In addition, for producing an output voltage with a constant number of steps, there are different configurations with a different number of components. In this paper, the optimal structures for this topology are investigated for various objectives such as minimum number of switches and dc voltage sources and minimum standing voltage on the switches for producing the maximum output voltage steps. Two new algorithms for determining the dc voltage sources magnitudes have been proposed. Finally, in order to verify the theoretical issues, simulation and experimental results for a 49-level converter with a maximum output voltage of 200V are presented.