• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.2
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• pp.163-168
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• 2014

Bottom gate thin-film transistors were fabricated using solution processed IGZO channel layers with various gallium composition ratios that were annealed on a hot plate. Increasing the gallium ratio from 0.1 to 0.6 induced a threshold voltage shift in the electrical characteristics, whereas the molar ratio of In:Zn was fixed to 1:1. Among the devices, the IGZO-TFTs with gallium ratios of 0.4 and 0.5 exhibited suitable switching characteristics with low off-current and low SS values. The IGZO-TFTs prepared from IGZO films with a gallium ratio of 0.4 showed a mobility, on/off current ratio, threshold voltage, and subthreshold swing value of $0.1135cm^2/V{\cdot}s$, ${\sim}10^6$, 0.8 V, and 0.69 V/dec, respectively. IGZO-TFTs annealed at $300^{\circ}C$, $350^{\circ}C$, and $400^{\circ}C$ were also fabricated. Annealing at lower temperatures induced a positive shift in the threshold voltage and produced inferior electrical properties.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.29 no.1
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• pp.11-16
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• 2016

The conduction behavior and electron concentration change in a-IGZO thin-films according to the RTA (rapid thermal annealing) were studied. The electrical characteristics of TFTs (thin-film-transistors) annealed by different temperatures were measured. The sheet resistance, electron concentration, and oxygen vacancy of a-IGZO film were measured by the four-point-probe-measurement, hall-effect-measurement, and XPS analysis. The RTA process increased the driving current of IGZO TFTs but the VTH shifted to the negative direction at the same time. When the RTA temperature is higher than $250^{\circ}C$, the leakage current at off-state increased significantly. This is attributed to the increase of oxygen vacancy resulting in the increase of electron concentration. We demonstrate that the RTA is a promising process to adjust the VTH of TFT because the RTA process can easily modify the electron concentration and control the conductivity of IGZO film with short process time.

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.169.1-169.1
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• 2015

최근 디스플레이 기술은 급속도로 발전해 가고 있다. 디스플레이 산업의 눈부신 성장에 발맞추어 초고화질, 초고선명, 고속 구동 및 대형화 등을 포함하는 최신 기술의 디스플레이 구동이 필요하다. 이러한 요구사항을 만족하기 위해서는 각 픽셀에 영상정보를 기입하는 충전시간을 급격히 감소시켜야 하고 따라서 픽셀 트랜지스터(TFT)의 이동도는 급격히 증가해야 한다. 따라서 차세대 디스플레이 실현을 위해서 고이동도 특성을 구현 할 수 있는 신물질의 개발이 매우 중요하다. 현재 산화물박막트랜지스터는 차세대 디스플레이 실현을 위해 가장 주목받고 있으며, 실제로 산화물박막 트랜지스터의 핵심소재인 In-Ga-Zn-O(a-IGZO) 산화물의 경우 국내외에서 디스플레이에 적용되어 생산이 시작되고있다. 그러나 a-IGZO 산화물의 경우 이동도가 $5-10cm^2V{\cdot}s$ 수준이어서 향후 개발 되어질 초고해상도/고속구동 디스플레이 실현(이동도 $50cm^2V{\cdot}s$)에는 한계가 있다. 따라서 본 연구에서는 이를 해결 할 수 있는 'post-IGZO' 개발을 위해 In2O3에 Ga2O3를 조성별로 고용시켜 박막의 구조적, 전기적, 광학적 특성 및 TFT를 제작하여 특성 연구를 진행하였다. 조성은 In2O3에 Ga2O3를 7.5%~15% 도핑 하였으며, Sputtering을 이용하여 indium gallium oxide(IGO) 박막을 제작하였다. 박막은 상온 및 $300^{\circ}C$에서 증착 하였으며 증착 된 IGO 박막은 Ga=12.5% 까지는 In2O3에 Ga이 모두 고용되어 cubic In2O3 poly crystalline을 나타내는 것을 확인하였으며 Ga=15%에서 Gallium 관련 2차상이 확인되었다. Ga양이 변화함에 따라 박막의 전기적 특성이 조절 가능하였으며 이를 이용하여 IGO 박막을 30 nm 두께로 증착 하여 IGO 박막을 channel layer로 사용하는 bottom gate structured TFTs를 제작 하였다. IGO TFTs는 Ga=10%에서 on/off ratio ${\sim}10^8$, 그리고 field-effect mobility $84.8cm^2/V{\cdot}S$를 나타내며 초고화질, 초고선명 차세대 디스플레이 적용 가능성을 보여 준다.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.301.2-301.2
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• 2016

Metal-oxide thin-film transistors (TFTs) have gained a considerable interest in transparent electronics owing to their high optical transparency and outstanding electrical performance even in an amorphous state. Also, these metal-oxide materials can be solution-processed at a low temperature by using deep ultraviolet (DUV) induced photochemical activation allowing facile integration on flexible substrates [1]. In addition, high-dielectric constant (k) inorganic gate dielectrics are also of a great interest as a key element to lower the operating voltage and as well as the formation of coherent interface with the oxide semiconductors, which may lead to a considerable improvement in the TFT performance. In this study, we investigated the electrical properties of solution-processed high-k strontium-doped AlOx (Sr-AlOx) gate dielectrics. Using the Sr-AlOx as a gate dielectric, indium-gallium-zinc oxide (IGZO) TFTs were fabricated and their electrical properties are analyzed. We demonstrate IGZO TFTs with a 10-nm-thick Sr-AlOx gate dielectric which can be operated at a low voltage (~5 V).

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.2
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• pp.249-254
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• 2015

Solution-derived amorphous indium-gallium-zinc oxide (a-IGZO) thin-film-transistor (TFTs) were developed using a microwave irradiation treatment at low process temperature below $300^{\circ}C$. Compared to conventional furnace-annealing, the a-IGZO TFTs annealed by microwave irradiation exhibited better electrical characteristics in terms of field effect mobility, SS, and on/off current ratio, although the annealing temperature of microwave irradiation is much lower than that of furnace annealing. The microwave irradiated TFTs showed a smaller $V_{th}$ shift under the positive gate bias stress (PGBS) and negative gate bias stress (NGBS) tests owing to a lower ratio of oxygen vacancies, surface absorbed oxygen molecules, and reduced interface trapping in a-IGZO. Therefore, microwave irradiation is very promising to low-temperature process.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.998-1001
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• 2009

A new flexible TFT backplane structure with improved mechanical reliability is proposed. Amorphous indium-gallium-zinc-oxide (a-IGZO) thin film transistors based on this structure have been fabricated on a polyimide substrate, and the resultant mechanical durability has been evaluated in a cyclic bending test. The panel can withstand 10,000 bending cycles at a bending radius of 5 mm without any noticeable TFT degradation. After 10K bending cycles, the change of threshold voltage, mobility, sub-threshold slope, and gate leakage current were only -0.22V, -0.13$cm^2$/V-s, -0.05V/decade, and $-3.05{\times}10^{-13}A$, respectively.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.8-8
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• 2009

Thin-film transistors (TFTs) were fabricated using amorphous indium gallium zinc oxide (a-IGZO) channels by rf-magnetron sputtering at room temperature. We have studied the effect of oxygen partial pressure on the threshold voltage($V_{th}$) of a-IGZO TFTs. Interestingly, the $V_{th}$ value of the oxide TFTs are slightly shifted in the positive direction due to increasing $O_2$ ratio from 1.2 to 1.8%. The device performance is significantly affected by varying $O_2$ ratio, which is closely related with oxygen vacancies provide the needed free carriers for electrical conduction.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.443-443
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• 2012

We fabricated a-IGZO TFT with AZO/Ag/AZO transparent multilayer source/drain contacts by rf magnetron sputtering. Enhanced electrical device performance of a-IGZO TFT with AZO/Ag/AZO multilayer S/D electrodes (W/L = = 400/50 mm) was achieved with a subs-threshold swing of 3.78 V/dec, a minimum off-current of 10-12 A, a threshold voltage of 1.80 V, a field effect mobility of 10.86 cm2/Vs, and an on/off ration of 9x109. It demonstrated the potential application of the AZO/Ag/AZO film as a promising S/D contact material for the fabrication of the high performance TFTs.

• Proceedings of the KIEE Conference
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• 2011.07a
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• pp.1420-1421
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• 2011

비정질 IGZO 박막 트랜지스터에 포지티브 직류/교류 게이트 바이어스를 인가하여 신뢰성을 분석하고 비정질 IGZO 박막 트랜지스터의 신뢰성을 고려한 시프트 레지스터 회로를 설계하였다. 비정질 IGZO 박막 트랜지스터의 문턱전압은 바이어스 스트레스가 인가되었을 때 양의 방향으로 이동하였고, 전류가 감소하였다. 또한 문턱전압은 직류 바이어스 스트레스가 인가되었을 때 교류 바이어스 스트레스가 인가 되었을 때 보다 더 양의 방향으로 이동하였다. 총 8개의 박막 트랜지스터로 구성된 일반적인 시프트 레지스터 회로에서는 특정 박막 트랜지스터에 직류 바이어스 스트레스가 걸리기 때문에 비정질 IGZO 박막 트랜지스터를 이용하여 구동할 때 회로 오동작을 유발할 수 있다. 비정질 IGZO 박막 트랜지스터의 신뢰성 결과를 고려하여 총 9개의 박막 트랜지스터로 구성된 교류 동작하는 시프트 레지스터 회로를 설계하였다. 모든 소자에 직류 바이어스 스트레스가 걸리지 않도록 회로를 설계하였으며, 추가된 트랜지스터의 채널 너비가 매우 작기 때문에 트랜지스터가 하나 추가되어도 회로가 차지하는 면적에는 거의 변화가 없다. 바이어스 스트레스에 따른 소자 열화를 고려하여 시뮬레이션을 해 본 결과 일반적인 회로에서는 회로 오동작이 관측된 반면, 제안한 회로에서는 문제없이 동작하는 것을 확인하였다.

• Journal of Information Display
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• v.13 no.4
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• pp.179-183
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• 2012

In this paper, a gate driver circuit for In-Ga-Zn-O thin-film transistors (TFTs) driven by only two clock signals is reported. In this circuit, the TFTs are turned off with a negative $V_{GS}$ by the two clock signals. As a result, it works properly and suppresses power consumption increase even though the TFT $V_T$ shifts in the negative direction.