• Title/Summary/Keyword: A Differential Amplifier

Search Result 229, Processing Time 0.028 seconds

A New PMU (parametric measurement unit) Design with Differential Difference Amplifier (차동 차이 증폭기를 이용한 새로운 파라메터 측정기 (PMU) 설계)

  • An, Kyung-Chan;Kang, Hee-Jin;Park, Chang-Bum;Lim, Shin-Il
    • Journal of Korea Society of Industrial Information Systems
    • /
    • v.21 no.1
    • /
    • pp.61-70
    • /
    • 2016
  • This paper describes a new PMU(parametric measurement unit) design technique for automatic test equipment(ATE). Only one DDA(differential difference amplifier) is used to force the test signals to DUT(device under test), while conventional design uses two or more amplifiers to force test signals. Since the proposed technique does not need extra amplifiers in feedback path, the proposed PMU inherently guarantees stable operation. Moreover, to measure the response signals from DUT, proposed technique also adopted only one DDA amplifier as an IA(instrument amplifier), while conventional IA uses 3 amplifiers and several resistors. The DDA adopted two rail-to-rail differential input stages to handle full-range differential signals. Gain enhancement technique is used in folded-cascode type DDA to get open loop gain of 100 dB. Proposed PMU design enables accurate and stable operation with smaller hardware and lower power consumption. This PMU is implemented with 0.18 um CMOS process and supply voltage is 1.8 V. Input ranges for each force mode are 0.25~1.55 V at voltage force and 0.9~0.935 V at current force mode.

A Transformer-Matched Millimeter-Wave CMOS Power Amplifier

  • Park, Seungwon;Jeon, Sanggeun
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.16 no.5
    • /
    • pp.687-694
    • /
    • 2016
  • A differential power amplifier operating at millimeter-wave frequencies is demonstrated using a 65-nm CMOS technology. All of the input, output, and inter-stage network are implemented by transformers only, enabling impedance matching with low loss and a wide bandwidth. The millimeter-wave power amplifier exhibits measured small-signal gain exceeding 12.6 dB over a 3-dB bandwidth from 45 to 56 GHz. The output power and PAE are 13 dBm and 11.7%, respectively at 50 GHz.

A Study on the Circuit Analysis of Composite BiCMOS Transistor and the Design Methodology of BiCMOS Differential Amplifier (복합 BiCMOS 트랜지스터의 회로 분석 및 그로 구성된 차동 증폭기의 설계기법에 관한 연구)

  • 송민규;김민규;박성진;김원찬
    • Journal of the Korean Institute of Telematics and Electronics
    • /
    • v.26 no.9
    • /
    • pp.1359-1368
    • /
    • 1989
  • In this paper, the composite BiCMOS transistor which combines a bipolar transistor and a MOS transistor in a cascade type, is analyzed in terms of I-V characteristics and small signal equivalent circuit. As a result, it has a larger driving capability than MOS transistor and a more extended rante of input voltage than bipolar transistor. Next, a BiCMOS differential amplifier as its application example is designed and compared with the CMOS one and the bipolar one. It increases the driving capability of the CMOS differential amp and improves the linear operation region of the bipolar differential amp.

  • PDF

A Design of Novel Instrumentation Amplifier Using a Fully-Differential Linear OTA (완전-차동 선형 OTA를 사용한 새로운 계측 증폭기 설계)

  • Cha, Hyeong-Woo
    • Journal of the Institute of Electronics and Information Engineers
    • /
    • v.53 no.1
    • /
    • pp.59-67
    • /
    • 2016
  • A novel instrumentation amplifier (IA) using fully-differential linear operational transconductance amplifier (FLOTA) for electronic measurement systems with low cost, wideband, and gain control with wide range is designed. The IA consists of a FLOTA, two resistor, and an operational amplifier(op-amp). The principal of the operating is that the difference of two input voltages applied into FLOTA converts into two same difference currents, and then these current drive resistor of (+) terminal and feedback resistor of op-amp to obtain output voltage. To verify operating principal of the IA, we designed the FLOTA and realized the IA used commercial op-amp LF356. Simulation results show that the FLOTA has linearity error of 0.1% and offset current of 2.1uA at input dynamic range ${\pm}3.0V$. The IA had wide gain range from -20dB to 60dB by variation of only one resistor and -3dB frequency for the 60dB was 10MHz. The proposed IA also has merits without matching of external resistor and controllable offset voltage using the other resistor. The power dissipation of the IA is 105mW at supply voltage of ${\pm}5V$.

A Low-Noise High Performance Amplifier for Low Input Signals (저입력신호를 위한 저잡음 고성능 증폭기)

  • 이대영
    • Journal of the Korean Institute of Telematics and Electronics
    • /
    • v.9 no.4
    • /
    • pp.17-24
    • /
    • 1972
  • A simply constructed and inexpensive amplifier that exhibits unusually low noise is studied. The high-performance differential amplifier combines high input impedence, adjustable gain, low in put noise and low output impedance. The amplifier is particularly useful in applications which call for large amplificaions of very low level signals.

  • PDF

Comparative Analysis and Performance Evaluation of New Low-Power, Low-Noise, High-Speed CMOS LVDS I/O Circuits (저 전력, 저 잡음, 고속 CMOS LVDS I/O 회로에 대한 비교 분석 및 성능 평가)

  • Byun, Young-Yong;Kim, Tae-Woong;Kim, Sam-Dong;Hwang, In-Seok
    • Journal of the Institute of Electronics Engineers of Korea SC
    • /
    • v.45 no.2
    • /
    • pp.26-36
    • /
    • 2008
  • Due to the differential and low voltage swing, Low Voltage Differential Signaling(LVDS) has been widely used for high speed data transmission with low power consumption. This paper proposes new LVDS I/O interface circuits for more than 1.3 Gb/s operation. The LVDS receiver proposed in this paper utilizes a sense amp for the pre-amp instead of a conventional differential pre-amp. The proposed LVDS allows more than 1.3 Gb/s transmission speed with significantly reduced driver output voltage. Also, in order to further improve the power consumption and noise performance, this paper introduces an inductance impedance matching technique which can eliminate the termination resistor. A new form of unfolded impedance matching method has been developed to accomplish the impedance matching for LVDS receivers with a sense amplifier as well as with a differential amplifier. The proposed LVDS I/O circuits have been extensively simulated using HSPICE based on 0.35um TSMC CMOS technology. The simulation results show improved power gain and transmission rate by ${\sim}12%$ and ${\sim}18%$, respectively.

Design and Fabrication of 0.5 V Two Stage Operational Amplifier Using Body-driven Differential Input Stage and Self-cascode Structure (바디 구동 차동 입력단과 Self-cascode 구조를 이용한 0.5 V 2단 연산증폭기 설계 및 제작)

  • Gim, Jeong-Min;Lee, Dae-Hwan;Baek, Ki-Ju;Na, Kee-Yeol;Kim, Yeong-Seuk
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.26 no.4
    • /
    • pp.278-283
    • /
    • 2013
  • This paper presents a design and fabrication of 0.5 V two stage operational amplifier. The proposed operational amplifier utilizes body-driven differential input stage and self-cascode current mirror structure. Cadence Virtuoso is used for layout and the layout data is verified by LVS through Mentor Calibre. The proposed two stage operational amplifier is fabricated using $0.13{\mu}m$ CMOS process and operation at 0.5 V is confirmed. Measured low frequency small signal gain of operational amplifier is 50 dB, power consumption is $29{\mu}W$ and chip area is $75{\mu}m{\times}90{\mu}m$.

Design of Magneto-Operational Amplifier Using Hall Device (Hall 소자를 이용한 자기 연산 증폭기 설계)

  • Baek, Kyoung-Il;Lee, Sang-Hun;Nam, Tae-Chul
    • Journal of Sensor Science and Technology
    • /
    • v.1 no.1
    • /
    • pp.13-21
    • /
    • 1992
  • We have constructed the magneto-operational amplifier(MOP) using the advantages of Hall device and an operational amplifier. The MOP necessarily requires a high impedance circuit, a differential-to-single-ended convert-sion circuit and feedback-input-element for operational amplifier characteristics. We have presented a new differential-to-single-ended conversion operational amplifier(DSCOP) having such characteristics. We have designed the MOP using the DSCOP and Hall device and simulated its characteristics, and finally we have constructed the system with discrete elements, and measured its magnetic characteristics.

  • PDF

A Study on Implementation of Linear 25Watts High Power Amplifier for VDR (VDR을 위한 선형 25Watts 고출력 증폭기 구현에 관한 연구)

  • Choi, Jun-Su;Hur, Chang-Wu
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 2011.10a
    • /
    • pp.389-391
    • /
    • 2011
  • This paper has been studied about design of linear 25Watt Power amplifier for VDR(VHF Data Radio). VDR's frequency band is 117.975~137MHz, and CSMA(Carrier Sense Multiple Access), D8PSK(Differential Eight Phase Shift Keyed), 25KHz's channel bandwidth use. It also stated in DO-281A MOPS output power, symbol constellation error, spurious emissions, adjacent channel power must be met. HPA is designed to meet DO-281A standard.

  • PDF

Post-Linearization of Differential CMOS Low Noise Amplifier Using Cross-Coupled FETs

  • Kim, Tae-Sung;Kim, Seong-Kyun;Park, Jin-Sung;Kim, Byung-Sung
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.8 no.4
    • /
    • pp.283-288
    • /
    • 2008
  • A post-linearization technique for the differrential CMOS LNA is presented. The proposed method uses an additional cross-coupled common-source FET pair to cancel out the third-order intermodulation ($IM_3$) current of the main differential amplifier. This technique is applied to enhance the linearity of CMOS LNA using $0.18-{\mu}m$ technology. The LNA achieved +10.2 dBm IIP3 with 13.7 dB gain and 1.68 dB NF at 2 GHz consuming 11.8 mA from a 1.8-V supply. It shows IIP3 improvement by 6.6 dB over the conventional cascode LNA without the linearizing circuit.