• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.3B
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• pp.541-548
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• 2000

In the MPEG-4 standardization phase, many methods for coding the irregular shaped VOP (video object Plane) have been researched. Texture coding is one of interesting research items in the MPEG-4. There are the Low pass extrapolation (LPE) padding, the shape adaptive DCT (SA-DCT), and the Extension-Interpolation (EI)/2D-DCT proposed in [1] as texture coding methods. the EI/2D-DCT is the method extending and interpolating luminance values from and Arbitrarily Shaped (AS) image segment into an 8 x 8 block and transforming the extended and interpolated luminance values by the 8x8 DCT. although the EI/2D-DCT and the SA-DCT work well in coding the As image segments. they are degraded since they use one-dimensional (1-D) methods such as the 1D-EI and the 1D-DCT in the two-dimensional (2-D) space. in this paper, we analyze the performance of the EI/2D-DCTand propose a new non-symmetric sig-sag scanning method, which non-symmetrically scans the quantized coefficients in the DCT domain to improve the EI/2D-DCT.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.3 s.345
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• pp.48-58
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• 2006

This paper presents 8x8 two dimensional DCT/IDCT processor of adder-based distributed arithmetic architecture without applying ROM units in conventional memories. To reduce hardware cost in the coefficient matrix of DCT and IDCT, an odd part of the coefficient matrix was shared. The proposed architecture uses only 29 adders to compute coefficient operation in the 2-D DCT/IDCT processor, while 1-D DCT processor consists of 18 adders to compute coefficient operation. This architecture reduced 48.6% more than the number of adders in 8x8 1-D DCT NEDA architecture. Also, this paper proposed a form of new transpose network which is different from the conventional transpose memory block. The proposed transpose network block uses 64 registers with reduction of 18% more than the number of transistors in conventional memory architecture. Also, to improve throughput, eight input data receive eight pixels in every clock cycle and accordingly eight pixels are produced at the outputs.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 1998.06a
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• pp.189-192
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• 1998

본 논문은 DCT (Discrete Cosine Transform) 영역에서의 압축 동영상 하향 전환기법 (down conversion)을 제안한다. DCT 영역에서의 하향 전환이 완전 복호화한 후 공간 영역에서 하향 전환하는 것보다 계산량 측면에서 상당한 이점이 있다. 또한 복호기 루프 내에서 영상 크기가 줄기 때문에 메모리의 부담을 덜 수 있다. 가장 간다한 방법으로서 복원된 영상의 화질이 약잔 떨어지더라도 계산량과 메모리를 줄이기 위해 8x8 DCT 블록의 저주파 영역의 4x4 DCT 계수만을 추출하여 4x4 IDCT하는 기법이 널리 알려져 있다. 본 논문에서는 변형된 4x4 IDCT 기저 함수를 이용한 새로운 DCT 영역에서의 하향 전환 기법을 제안한다. 모의실험을 통해 제안한 기법이 기존의 DCT 영역에서의 하향 전환기법과 같은 계산량 및 메모리로 향상된 PSNR을 갖는다는 것을 보인다.

• The KIPS Transactions:PartA
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• v.18A no.2
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• pp.39-44
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• 2011

This paper proposes the new high-performance circuit architecture of the transform and quantization for unified video CODEC. The proposed architecture can be applied to all kinds of transforms and quantizations for the video compression standards such as JPEG, MPEG-1/2/4, H.264 and VC-1. We defined the permutation matrices to reorder the transform matrix of the $8{\times}8$ DCT and partitioned the reordered $8{\times}8$ transform matrix into four $4{\times}4$ sub-matrices. The $8{\times}8$ DCT is performed by repeating the $4{\times}4$ DCT's based on the reordered and partitioned transform matrices. Since our circuit accepts the transform coefficients from the users, it can be extended very easily to cover any kind of DCT-based transforms for future standards. The multipliers in the DCT circuit are shared by the quantization circuit in order to minimize the circuit size. The quantization circuit is merged into the DCT circuit without any significant increase of circuit resources and processing time. We described the proposed DCT and quantization circuit at RTL, and verified its operation on FPGA board.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.5B
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• pp.669-676
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• 2001

본 논문은 DCT 기반의 블라인드 워터마킹 방법에 관한 연구 결과이다. 본 논문에서 사용한 4096비트의 워터마크는 512x512 영상이 수용할 수 있는 최대 용량의 절반에 해당한다. 각 워터마크 비트는 8x8 DCT 블록의 12개의 계수에 확산 패턴을 이용하여 삽입하였다. 워터마크 삽입 과정에서, 워터마크 이득 계수는 비가시성과 견고성을 고려하여 최적화되었다. 워터마크 검출 과정에서는, 상관검출을 통하여 워터마크에 대한 예비판정을 하며, 이진가설 검증의 검증 과정을 통해서 예비판정에서의 검출 오류를 수정하였다. 검증 과정에서는 복원된 DCT계수를 이용한 가중치가 사용되었으며, 대부분의 예비 판정의 오류는 검증 과정에서 수정이 되었다. 실험 결과, 영상에 공격이 가해지지 않은 경우는 최종 검증 후에 BER이 0.5% 미만으로 낮아졌으며, 20% JPEG의 고압축에서도 BER이 9% 미만으로 산출되었다. 기존의 방법들과의 비교에서, 제안한 방법은 워터마크 검출 성능 및 워터마크 용량 측면에서 우수하였다.

• KIPS Transactions on Software and Data Engineering
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• v.8 no.4
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• pp.171-178
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• 2019

The use of anti-scatter grids in radiographic imaging has the advantage of preventing the image distortion caused by scattered radiation. However, it carries the side effect of leaving artifacts in the X-ray image. In this paper, we propose a grid line suppression technique using discrete cosine transform(DCT). In X-ray images, the grid lines have different characteristics depending on the shape of the object and the area of the image. To solve this problem, we adopt the DCT transform based on a dynamic segmentation, and propose a filter transfer function for each individual segment. An algorithm for detecting the band of grid lines in frequency domain and a band stop filter(BSF) with a filter transfer function of a combination of Kaiser window and Butterworth filter have been proposed. To solve the blocking effects, we present a method to determine the pixel values using multiple structured images. The validity of the proposed theory has been evaluated from the experimental results using 140 X-ray images.

• Journal of KIISE:Software and Applications
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• v.28 no.2
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• pp.141-148
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• 2001

DCT(Discrete Cosine Transform) 변환은 MPEG과 JPEG 표준에 의하여 영상이나 비디오 영상을 압축하는데 사용되어져 왔다. 본 연구에서는 이상적인 경계가 관련된 특성을 유도하고, 실시간 처리를 위하여 모델에 바탕을 둔 DCT 영역에서의 불연속 경계 평가 방법을 제안한다. 이 방법은 방향 검증과 위치 정렬 등의 평가로 구성된다. 두 가지의 평가 방법에 의하여 경계의 다양한 방향과위치를 알 수 있으며, DCT 계수들을 표준화된 형식으로 정렬시킬 수 있고, 표준화된 DCT 계수에서 이상적인 계단 경계의 특성과 비교하여 경계의 크기를 산출할 수 있다. DCT 계수가 8x8의 블록 단위로 이루어져 있어 경계의 표현이 조밀하지는 않지만 처리 시간이 빠르고 잡음에 강한 특성을 가지고 있어 다양한 실시간 응용분야에 사용될 수 있을 것이다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.15 no.1
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• pp.58-70
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• 1990

This paper describes a VLSI implementation of real-time two dimensional DCT processor for the subprimary rate video codec system. The proposed architecture exploits the parallelism and concurrency of the distributes architecture for vector inner product operation of DCT and meets the CCITT performance requirements of video codec for full CSIF 30 frames/sec. It is also shown that this architecture satisfies all the CCITT IDCT accuracy specification by simulating the suggested architecture in bit level. The efficient VLSI disign methodology to design suggested architecture is considered and the module generator oriented design environments are constructed based on SUN 3/150C workstation. Using the constructed design environments. the suggensted architecture have been designed by double metal 2micron CMOS technology. The chip area fo designed 8x8 2-D DA-DCT (Distributed Arithmetic DCT) processor is about 3.9mmx4.8mm.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2018.05a
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• pp.107-110
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• 2018

Image compression is the application of Data compression on digital images. The (DCT) discrete cosine transform is a technique for converting a time domain to a frequency domain. It is widely used in image compression. First, the image is divided into 8x8 pixel blocks. Apply the DCT to each block while processing from top to bottom from left to right. Each block is compressed through quantization. The space of the compressed block array constituting the image is greatly reduced. Reconstruct the image through the IDCT. The purpose of this research is to understand compression/decompression of images using the DCT method.

• The KIPS Transactions:PartD
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• v.17D no.6
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• pp.463-470
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• 2010

We presented a very fast and robust method of text line segmentation based on the DCT blocks of color image without decompression and binary transformation processes. Using DC and another three primary AC coefficients from block DCT we created a gray-scale image having reduced size by 8x8. In order to detect and locate white strips between text lines we analyzed horizontal and vertical projection profiles of the image and we applied a direct markov model to recover the missing white strips by estimating hidden periodicity. We presented performance results. The results showed that our method was 40 - 100 times faster than traditional method.