• Title/Summary/Keyword: 802.11 n

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Design and Implementation of IEEE 802.11i MAC Layer (IEEE 802.11i MAC Layer 설계 및 구현)

  • Hong, Chang-Ki;Jeong, Yong-Jin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.34 no.8A
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    • pp.640-647
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    • 2009
  • IEEE 802.11i is an amendment to the original IEEE 802.11/b,a,g standard specifying security mechanism by stipulating RSNA for tighter security. The RSNA uses TKIP(Temporal Key Integrity Protocol) and CCMP(Counter with CBC-MAC Protocol) instead of old-fashioned WEP(Wired Equivalent Privacy) for data encryption. This paper describes a design of a communication security engine for IEEE 802.11i MAC layer. The design includes WEP and TKIP modules based on the RC4 encryption algorithm, and CCMP module based on the AES encryption algorism. The WEP module suffices for compatibility with the IEEE 802.11 b,a,g MAC layer. The CCMP module has about 816.7Mbps throughput at 134MHz, hence it satisfies maximum 600Mbps data rate described in the IEEE 802.11n specifications. We propose a pipelined AES-CCMP cipher core architecture, which has lower hardware cost than existing AES cores, because CBC mode and CTR mode operate at the same time.

A Design of LDPC Decoder for IEEE 802.11n Wireless LAN (IEEE 802.11n 무선 랜 표준용 LDPC 복호기 설계)

  • Jung, Sang-Hyeok;Shin, Kyung-Wook
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.5
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    • pp.31-40
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    • 2010
  • This paper describes a LDPC decoder for IEEE 802.11n wireless LAN standard. The designed processor supports parity check matrix for block length of 1,944 and code rate of 1/2 in IEEE 802.11n standard. To reduce hardware complexity, the min-sum algorithm and layered decoding architecture are adopted. A novel memory reduction technique suitable for min-sum algorithm was devised, and our design reduces memory size to 25% of conventional method. The LDPC decoder processor synthesized with a $0.35-{\mu}m$ CMOS cell library has 200,400 gates and memory of 19,400 bits, and the estimated throughput is about 135 Mbps at 80 MHz@2.5v. The designed processor is verified by FPGA implementation and BER evaluation to validate the usefulness as a LDPC decoder.

Efficient Block ACK Scheme for Reducing the Number of Retransmitted Frames in IEEE 802.11n Wireless LANs (IEEE 802.11n 무선 랜에서 재전송 프레임 수를 줄이기 위한 향상된 Block ACK 방법)

  • Lee, Hyun-Woong;Kim, Sunmyeng
    • Journal of the Korea Society for Simulation
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    • v.23 no.4
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    • pp.65-74
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    • 2014
  • IEEE 802.11n standard has introduced the new schemes in MAC and PHY layers to improve network throughput. Frame aggregation and Block ACK are mainly defined to increase the efficiency of the MAC layer. There exists still problem in IEEE 802.11n. When block ACK request and/or response frames are missing or received in error, the sender does not know the status (success/failure) of each frame in the aggregated large frame and retransmits all the frames. This can cause a lower network performance. To solve this problem, we propose a new effective scheme, called reduced retransmission of MPDUs (RRM) scheme. In the proposed scheme, when a sender does not receive a block ACK response frame, it just transmits a next data frame and requests a block ACK. Therefore, it can retransmits the erroneous frames. Performance of the proposed scheme is investigated by simulation. Our results show that the proposed scheme is very effective and improves the performance under a wide range of channel error conditions.

Implementation of IEEE 802.11n MAC using Design Methodology (통합된 구현 방식을 이용한 IEEE 802.11n MAC의 설계)

  • Chung, Chul-Ho;Lee, Sun-Kee;Jung, Yun-Ho;Kim, Jae-Seok
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.34 no.4B
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    • pp.360-367
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    • 2009
  • In this paper, we propose a design methodology of IEEE 802.11n MAC which aims to achieve the higher throughput of more than 100Mbps in downlink as measured at the MAC-SAP and present the implementation results of MAC using the proposed design methodology. With our proposed methodology, different from the conventional design flow which has the separate codes for the protocol validation, for the network simulation, and for the system implementation, the unified code can be used for the network simulation and the implementation of software and hardware. Our MAC architecture is partitioned into two parts, Upper-layer MAC and Lower-layer MAC, in order to achieve the high efficiency for the new features of IEEE 802.11n standard. They are implemented in software and hardware respectively. The implemented MAC is tested on ARM based FPGA board.

Technologies trend for Wireless LAN (무선 LAN 통신망의 기술 동향)

  • Gang, Yeong-Jin;Kim, Sung-Nam;Kang, Sin-Ill;Lee, Yeong-Sil;Lee, Hoon-Jae
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2011.10a
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    • pp.255-258
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    • 2011
  • Wi-Fi is a rapidly spreading communications network with Smart phone's publication, the technology has become Ubiquitous-based core network which is connected to personal computers, laptops, and tablet PC. Wi-Fi can send currently a variety of data standard due to developed wireless LAN communications network. One of Wi-Fi standard protocols, which is IEEE 802.11n, use 2.4GHz and 5GHz band. 2.4GHz band is used for 802.11b/g protocol because wavelength is long, diffraction and receiving distance is enough to connect other device. 5GHz band has more available channels to use than 2.4GHz band, so there is no frequency interference of other wireless device such as Bluetooth, RFID. Moreover, there is low interference between channels due to small users in each bandwidth level. In the thesis, we are going to analyze 802.11a/b/g protocol which has used since the beginning of Wi-Fi protocol and 802.11n protocol which is used lately. Furthermore, we look into development and direction for standardization of the next generation wireless LANs which are 802.11ac and 802.11ad. In addition, we will consider for the security, vulnerabilities and its countermeasure in Wireless LAN.

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Design of Link Cost Metric for IEEE 802.11-based Mesh Routing (IEEE 802.11 MAC 특성을 고려한 무선 메쉬 네트워크용 링크 품질 인자 개발)

  • Lee, Ok-Hwan;Kim, Seong-Kwan;Choi, Sung-Hyun;Lee, Sung-Ju
    • Journal of KIISE:Information Networking
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    • v.36 no.5
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    • pp.456-469
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    • 2009
  • We develop a new wireless link quality metric, ECOT(Estimated Channel Occupancy Time) that enables a high throughput route setup in wireless mesh networks. The key feature of ECOT is to be applicable to diverse mesh network environments where IEEE 802.11 MAC (Medium Access Control) variants are used. We take into account the exact operational features of 802.11 MAC protocols, such as 802.11 DCF(Distributed Coordination Function), 802.11e EDCA(Enhanced Distributed Channel Access) with BACK (Block Acknowledgement), and 802.11n A-MPDU(Aggregate MAC Protocol Data Unit), and derive the integrated link metric based on which a high throughput end-to-end path is established. Through extensive simulation in random-topology settings, we evaluate the performance of proposed link metric and present that ECOT shows 8.5 to 354.4% throughput gain over existing link metrics.

Recent Trends to Next-Generation Wireless LANs (차세대 무선랜 최신 기술동향)

  • Cheong, M.;Lee, S.K.;Bang, S.C.
    • Electronics and Telecommunications Trends
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    • v.27 no.2
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    • pp.1-10
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    • 2012
  • 최근 와이파이를 채용한 스마트폰에 대한 수요가 폭발적으로 증가함에 따라 무선랜에 기반한 새로운 신규 기술들이 활발히 연구되고 있다. Gbps 이상의 전송을 가능하게 하는 IEEE 802.11ac는 차세대 스마트폰을 위한 핵심 기술로서 기존의 IEEE 802.11n에서는 수용할 수 없었던 초고화질의 비디오 전송을 가능하게 한다. 또한 최근에는 무선랜을 사용하여 최대 수 km까지 광역으로 서비스를 지원하기 위한 광역 무선랜이 IEEE 802.11af 및 802.11ah에서 연구되고 있으며, 초기 링크 셋업 시간을 획기적으로 절감하기 위한 IEEE 802.11ai 기술도 활발히 논의되고 있다. 본고에서는 이러한 IEEE 802.11ac, IEEE 802.11af, IEEE 802.11ah, IEEE 802.11ai 무선랜 기술에 대한 표준화 추진 현황 및 주요 이슈들에 대해 기술하고자 한다.

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Evaluation of Interference Alignment for MIMO-IC based on IEEE 802.11n (IEEE 802.11n 기반 MIMO-IC의 간섭정렬 성능평가)

  • Bae, Insan;Yun, Heesuk;Kim, Jaemoung
    • Journal of Satellite, Information and Communications
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    • v.8 no.4
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    • pp.47-52
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    • 2013
  • In this paper, The existing interference alignment algorithms were analyzed in Rayleigh fading channel environment. The interference alignment techniques are divided to two parts. First thing is Iterative-method, another is Linear-method. Iterative method needs local channel info, but it has the constraint of iteration. On the other hand Linear-method must have global channel info, but has free of iteration and better performance. This paper evaluates the performance of interference alignment algorithms in Rayleigh fading channel of outdoor environment and WLAN channel based on IEEE 802.11n of indoor environment.

An analysis of Multi-mode LDPC Decoder Performance for IEEE 802.11n WLAN (IEEE 802.11n WLAN용 Multi-mode LDPC 복호기의 성능 분석)

  • Park, Hae-Won;Na, Young-Heon;Shin, Kyung-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2010.10a
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    • pp.80-83
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    • 2010
  • This paper describes an analysis of decoding performance of multi-mode LDPC(Low Density Parity Check) decoder which supports three block lengths (648, 1296, 1944) and four code rates (1/2, 2/3,3/4, 5/6) for IEEE 802.11n WLAN system. A fixed-point model of LDPC decoder which adopts min-sum algorithm and layered decoding scheme is implemented using Matlab. From fixed-point simulation results for various bit-width parameters such as internal bit-width, bit-width of integer and fractional parts, an optimal design condition and decoding performance of LDPC decoder are analyzed.

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An analysis of Optimal Design Conditions of Multi-mode LDPC Decoder for IEEE 802.11n WLAN System (IEEE 802.11n WLAN용 다중모드 LPDC 복호기의 최적 설계조건 분석)

  • Park, Hae-Won;Na, Young-Heon;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.15 no.2
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    • pp.432-438
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    • 2011
  • This paper describes an analysis of optimal design conditions of multi-mode LDPC(low density parity check) decoder which supports three block lengths (648, 1296, 1944) and four code rates (1/2, 2/3, 3/4, 5/6) for IEEE 802.11n WLAN system. A fixed-point model of LDPC decoder, which adopts min-sum algorithm and layered decoding scheme, is implemented using Matlab. From fixed-point simulation results for various bit-width parameters such as internal bit-width, integer/fractional part bit-widths, optimal design conditions and decoding performance of LDPC decoder are analyzed.