• 제목/요약/키워드: 4-level inverter

검색결과 117건 처리시간 0.024초

Drive Circuit of 4-Level Inverter for 42V Power System

  • Park, Yong-Won;Sul, Seung-Ki
    • KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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    • 제11B권3호
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    • pp.112-118
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    • 2001
  • In the near future, the voltage of power system for passenger vehicle will be changed to 42V from existing 14V./ Because of increasing power and voltage ratings used in the vehicle the motor drive system has high switching dv/dt and it generates electromagnetic interference (EMI) To solve these problems multi-level inverter system may be used The feature of multi-level inverter is the output voltage to be synthesized from several levels of voltage Because of this feature high switching dv/dt and EMI can be reduced in the multi-level inverter system But as the number of level is increased manufacturing cost is getting expensive and system size is getting large. Because of these disadvantages the application of multi-level inverter has been restricted only to high power drives. The method to reduce manufacturing cost and system size is to integrate circuit of multi-level inverter into a few chips But isolated power supply and signal isolation circuit using transformer or opto-coupler for drive circuit are obstacles to implement the integrated circuit (IC) In this paper a drive circuit of 4-level inverter suitable for integration to hybrid or one chip is proposed In the proposed drive circuit DC link voltage is used directly as the power source of each gate drive circuit NPN transistors and PNP transistors are used to isolate to transfer the control signals. So the proposed drive circuit needs no transformers and opto-couplers for electrical isolation of drive circuit and is constructed only using components to be implemented on a silicon wafer With th e proposed drive circuit 4- level inverter system will be possible to be implemented through integrated circuit technology Using the proposed drive circuit 4- level inverter system is constructed and the validity and characteristics of the proposed drive circuit are proved through the experiments.

SRM의 고속구동을 위한 제어시스템 설계 (A Design of High Speed SRM Drive System)

  • 이주현;이동희;안진우
    • 대한전기학회논문지:전기기기및에너지변환시스템부문B
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    • 제55권7호
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    • pp.337-345
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    • 2006
  • This paper proposes a high speed SRM drive system for blower application with a new 4-level inverter and precise excitation position generator. For a high speed blower, a proper inverter and control method are proposed and the output characteristics are analyzed. In order to get a fast build-up and demagnetization of excitation current, a 4-level inverter system is proposed. The proposed 4-level inverter has additional charge capacitor, power switch and diode in the conventional asymmetric converter. The charged high voltage is supplied to the phase winding for fast current build-up, and demagnetization current is charged to additional capacitor of the 4-level inverter. In addition, a precise excitation position generator can reduce turn-on and turn-off angle error according to sampling period of digital control system. The proposed high speed SRM drive system is verified by computer simulation and experimental results.

4 - 레벨 출력을 갖는 단상 인버어터의 PWM (PWM for Single Phase Inverter with 4 - Level Output)

  • 장현수;진명철;이광원
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1989년도 하계종합학술대회 논문집
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    • pp.527-530
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    • 1989
  • In order to reduce harmonic contents in the inverter output, various PWM ( pulse with modulation ) techniques have been utilized. This paper suggests a single phase inverter with 4-level output and its PWM control scheme. The proposed 4-level output inverter shows better performence than the 3-level output one in respects of the current error and the switching frequency.

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4-레벨 인버터 및 컨버터를 위한 새로운 스너버회로 (A New Snubber Circuit for Four-Level Inverter and Converter)

  • 김인동;노의철
    • 대한전기학회논문지:전기기기및에너지변환시스템부문B
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    • 제49권9호
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    • pp.598-606
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    • 2000
  • This paper proposes a new snubber circuit for 4-level inverter and converter. The snubber circuit makes use of Undeland snubber and McMurray efficient snubber as basic snubber unit and can be regarded as a generalized combined Undeland and McMurray efficient snubber. The proposed snubber keeps such good features as fewer number of components improved efficiency due to low snubber loss capability of clamping overvoltage across main switching devices and no unbalance problem of blocking voltage. Furthermore the proposed concept of constructing a snubber circuit for 4-level inverter and converter can apply to any level of converterand inverter.

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영전압 스위칭 3-레벨 보조 공진 폴 인버터 (Zero-voltage-switching three level auxiliary resonant commutated pole inverter)

  • 유동욱;원충연;조정구;백주원
    • 대한전기학회논문지
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    • 제45권4호
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    • pp.535-542
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    • 1996
  • A zero voltage switching (ZVS) three level auxiliary resonant commutated pole inverter (ARCPI) is presented for high power GTO inverters. The concept of ARCP for two level inverter is extended to the three inverter. The proposed auxiliary commutation circuit consists of one resonant inductor and two bi-directional switches, which provides ZVS condition to the main devices without increasing device voltage or current stresses. The auxiliary device operates with zero current switching (ZCS) which enables use of the low cost thyristors. The proposed ARCPI can handle higher voltage and higher power (1-10MVA) comparing to the two level one. Operation and analysis of the ARCPI are illustrated and the features are compared o those of the snubber circuit incorporated three level inverter. Experimental results with 10kW, 4kHz prototype are presented to verify the principle of operation. (author). refs., figs., tab.

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Design and Implementation of a Multi Level Three-Phase Inverter with Less Switches and Low Output Voltage Distortion

  • Ahmed, Mahrous E.;Mekhilef, Saad
    • Journal of Power Electronics
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    • 제9권4호
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    • pp.593-603
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    • 2009
  • This paper proposes and describes the design and operational principles of a three-phase three-level nine switch voltage source inverter. The proposed topology consists of three bi-directional switches inserted between the source and the full-bridge power switches of the classical three-phase inverter. As a result, a three-level output voltage waveform and a significant suppression of load harmonics contents are obtained at the inverter output. The harmonics content of the proposed multilevel inverter can be reduced by half compared with two-level inverters. A Fourier analysis of the output waveform is performed and the design is optimized to obtain the minimum total harmonic distortion. The full-bridge power switches of the classical three-phase inverter operate at the line frequency of 50Hz, while the auxiliary circuit switches operate at twice the line frequency. To validate the proposed topology, both simulation and analysis have been performed. In addition, a prototype has been designed, implemented and tested. Selected simulation and experimental results have been provided.

계통연계형 멀티스트링 3상 3레벨 태양광 인버터의 MPPT 제어방법에 관한 연구 (A Study on the MPPT Control Method for Grid-connected Multi-String Three-Phase Three-Level PV Inverter)

  • 김진수;양오
    • 반도체디스플레이기술학회지
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    • 제13권4호
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    • pp.43-48
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    • 2014
  • Two-level inverter has some disadvantages like high harmonics contained in the output current, efficiency limit and stress to switching device as IGBT and FET. Many researches have reported multi-level inverter to complement two-level inverter of problems. In this paper, we suggest MPPT algorithm of multi-string three-level solar inverter that considered nowadays. We added midpoint controller in order to implement the MPPT algorithm because the three-level inverter has to need midpoint controller and procured the stability of direct current link. We verify the superiority of multi-string T-Type inverter and the algorithm we suggested with solar irradiance variation experiment and MPPT efficiency measurement. The MPPT efficiency was confirmed with a high efficiency more than 99.97%.

출력전압 레벨 수와 전류정격을 고려한 PWM 다중레벨 인버터 (Multi-level PWM Inverter Considering the number of Output Voltage level and Current rating)

  • 박노식;서종준;박성준;김광헌;조수억;김철우
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2005년도 전력전자학술대회 논문집
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    • pp.659-662
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    • 2005
  • In this paper, we proposed the novel hybrid multi-level inverter using combination of the output voltage of transformers to reduce the THD(Total Harmonic Distortion) and improve the waveform of output voltage. The proposed multi-level inverter used the output of transformer which is 1times, 2times, 4times of input of the transformers. So we increased the output voltage from the reduce the number of switching component and transformer. Also, we tested the proposed prototype 15-level inverter to clarify the proposed electric circuit and reasonableness of control signal for the proposed multi -level PWM inverter.

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고속 SRM 구동시스템 설계 (Design of High Speed Drive)

  • 김태형;안영주;이동희;안진우
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2006년도 춘계학술대회 논문집 전기기기 및 에너지변환시스템부문
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    • pp.95-98
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    • 2006
  • This paper proposes high speed SRM drive system for blower with a new 4-level inverter and precise excitation position generator. For the high speed blower, a proper inverter and control method are proposed and the output characteristics are analyzed. In order to get a fast build-up and demagnetization of excitation a current, 4-level inverter system is proposed. The proposed 4-level inverter has additional charge capacitor, power switch and diode in the conventional asymmetric converter. The charged high voltage is supplied to the phase winding for fast current build-up, and demagnetization current is charged to additional capacitor of 4-level inverter. In addition, a precise excitation position generator can reduce turn-on and turn-off angle error according to sampling period of digital control system. The proposed high speed SRM drive system is verified by computer simulation and experimental result.

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Cascaded H-Bridge Five Level Inverter for Grid Connected PV System using PID Controller

  • Sivagamasundari, M.S.;Mary, P. Melba
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제16권4호
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    • pp.451-462
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    • 2016
  • Photovoltaic energy conversion becomes main focus of many researches due to its promising potential as source for future electricity and has many advantages than the other alternative energy sources like wind, solar, ocean, biomass, geothermal etc. In Photovoltaic power generation multilevel inverters play a vital role in power conversion. The three different topologies, diode-clamped (neutral-point clamped) inverter, capacitor-clamped (flying capacitor) inverter and cascaded h-bridge multilevel inverter are widely used in these multilevel inverters. Among the three topologies, cascaded h-bridge multilevel inverter is more suitable for photovoltaic applications since each pv array can act as a separate dc source for each h-bridge module. This paper presents a single phase Cascaded H-bridge five level inverter for grid-connected photovoltaic application using sinusoidal pulse width modulation technique. This inverter output voltage waveform reduces the harmonics in the generated current and the filtering effort at the input. The control strategy allows the independent control of each dc-link voltages and tracks the maximum power point of PV strings. This topology can inject to the grid sinusoidal input currents with unity power factor and achieves low harmonic distortion. A PID control algorithm is implemented in Arm Processor LPC2148. The validity of the proposed inverter is verified through simulation and is implemented in a single phase 100W prototype. The results of hardware are compared with simulation results. The proposed system offers improved performance over conventional three level inverter in terms of THD.