• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.3
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• pp.255-260
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• 2016

In this paper, a full-wave rectifier (FWR) with a simple vibration detector suitable for use with vibrational energy harvesting systems is presented. Conventional active FWRs where active diodes are used to reduce the diode voltage drop and increase the system efficiency are usually powered from the output. Output-powered FWRs exhibit relatively high efficiencies because the comparators used in active diodes are powered from the stable output voltage. Nevertheless, a major drawback is that these FWRs consume power from the output storage capacitor even when the system is not harvesting any energy. To overcome the problem, a technique using a simple vibration detector consisting of a peak detector and a level converter is proposed. The vibration detector detects whether vibrational energy exists or not in the input terminal and disables the comparators when there is no vibrational energy. The proposed FWR with the vibration detector is designed using a $0.35-{\mu}m$ CMOS process. Simulation results have verified the effectiveness of the proposed scheme. By using the proposed vibration detector, a decrease in leakage current by approximately 67,000 times can be achieved after the vibration disappears.

• Proceedings of the IEEK Conference
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• 2002.06e
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• pp.95-98
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• 2002

This paper presents a study on DSP(TMS320F240) controller design for multi-axes transportation system using BLDC servo motor. This BLDC servo motor controller was realized with DSP(Digital Signal Processor) and IPM (Intelligent Power Module). The multi-axes transportation system needs torque, speed, position control of servo motor for variable action. This paper implements those servo control with vector control and space vector modulation technique. As CPU of controller DSP(TMS320F240) is adopted because, it has PWM(Pulse Width Modulation) waveform generator, A/D(Analog to Digital) converter, SPI(Serial Peripheral Interface) port and input/output port etc. The controller of multi-axes transportation system consists of 3-level hierarchy structure that main host PC manages three sub DSP system which transfer downword command and are monitoring the states of end servo controllers. Each sub DSP system operates eight BLDC servo controllers which control BLDC servo motor using DSP and IPM Between host system and middle digital signal processor communicate with RS-422, between main processor and controller communicate with SPI port.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.5 s.347
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• pp.54-63
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• 2006

This work proposes a 14b 100MS/s 0.18um CMOS ADC with optimized resolution, conversion speed, die area, and power dissipation to obtain the performance required in the fourth-generation mobile communication systems. The 3-stage pipeline ADC, whose optimized architecture is analyzed and verified with behavioral model simulations, employs a wide-band low-noise SHA to achieve a 14b level ENOB at the Nyquist input frequency, 3-D fully symmetric layout techniques to minimize capacitor mismatch in two MDACs, and a back-end 6b flash ADC based on open-loop offset sampling and interpolation to obtain 6b accuracy and small chip area at 100MS/s. The prototype ADC implemented in a 0.18um CMOS process shows the measured DNL and INL of maximum 1.03LSB and 5.47LSB, respectively. The ADC demonstrates a maximum SNDR and SFDR of 59dB and 72dB, respectively, and a power consumption of 145mW at 100MS/s and 1.8V. The occupied active die area is $3.4mm^2$.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.5
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• pp.152-159
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• 2016

This paper describes an offset and 1/f noise cancellation technique based hall sensor signal processor. The hall sensor outputs a hall voltage from the input magnetic field, which direction is orthogonal to hall plate. The two major elements to complete the hall sensor operation are: the one is a hall sensor to generate hall voltage from input magentic field, and the other one is a hall signal process system to cancel the offset and 1/f noise of hall signal. The proposed hall sensor splits the hall signal and unwanted signals(i.e. offset and 1/f noise) using a spinning current biasing technique and chopper stabilizer. The hall signal converted to 100 kHz and unwanted signals stay around DC frequency pass through chopper stabilizer. The unwanted signals are bloked by highpass filter which, 60 kHz cut off freqyency. Therefore only pure hall signal is enter the ADC(analog to dogital converter) for digitalize. The hall signal and unwanted signal at the output of an amplifer and highpass filter, which increase the power level of hall signal and cancel the unwanted signals are -53.9 dBm @ 100 kHz and -101.3 dBm @ 10 kHz. The ADC output of hall sensor signal process system has -5.0 dBm hall signal at 100 kHz frequency and -55.0 dBm unwanted signals at 10 kHz frequency.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.21 no.3
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• pp.17-23
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• 2020

This paper proposes a simulation model using an equivalent circuit for the development of an MMC system. The MMC has been chosen as the most suitable topology for high voltage power transmission, such as a voltage-type HVDC, and it has dozens to hundreds of sub-modules in the form of a half-bridge or full-bridge connected in series. A simulation study is essential for the development of an MMC algorithm. On the other hand, it is virtually impossible to construct and implement MMC simulation models, including hundreds or thousands of switching devices. Therefore, this paper presents an MMC equivalent model, which is easily expandable and implemented by modeling the dynamic characteristics. The voltage and current equation of the equivalent circuit was calculated using the direction of the arm current and switching signal. The model was implemented on Matlab/Simulink. In this paper, to show the validity of the model developed using Matlab/Simulink, the simulation results of a five-level MMC using the real switching element and the proposed equivalent model are shown. The validity of the proposed model was verified by showing that the current and voltage waveform in the two models match each other.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.39 no.6
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• pp.553-558
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• 2011

This paper describes the development and test result of S-band Transmitter flight model(FM) of STSAT-3 by satellite research center(SaTReC), KAIST. The communication sub-system of STSAT-3 is consist of two different frequency band channels, S-band for Telemetry & Command and X-band for mission data. S-band Transmitter(STX) functionally made of modulator, frequency synthesizer, power amp and DC/DC converter. The transmission data is modulated by FSK(Frequency Shift Keying) and the interface between spacecraft sub-module and STX is RS-422 standard method. The FM STX is based on modular design. The RF output power of STX is 1.5W(31.7dBm) and BER of STX is under $1{\times}10^{-5}$ which meets the specification respectively. The FM STX is delivered Spacecraft Assembly, Integration and Test(AIT) level through the completion of functional Test and environmental(vibration, thermal vacuum) Test successfully.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.1 s.116
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• pp.37-43
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• 2007

In this.paper, we introduce design and implementation results of the single balanced diode mixer for European point-to-point microwave radio in order to improve flatness performance. When a resonator such as RF filter is integrated with a mixer, impedance characteristic of 50 ohm is maintained only in RF band, not in LO band resulting deterioration of flatness performance because of LO power variation on the diode. In the paper, we suggest a design method of mixer integrated with image rejection filter and LO harmonic filter to have a better performance of flatness using embedding electrical length between filter and mixer's port. Frequency specification of fabricated mixer is $21.2{\sim}22.6\;GHz$ for RF, $19.32{\sim}20.72\;GHz$ for LO and 1.88 GHz+/-50 MHz for IF, respectively. Measured results show conversion loss of 8.5 dB, flatness of 2 dB, input PldB of 8 dBm, IIP3 of 15 dBm under LO power level of 10 dBm. Return losses of RF, LO and IF port are under -12 dB, -10 dB and -5 dB, respectively. Isolations of LO/RF and LO/IF are 20 dB and 50 dB, respectively.