• 제목/요약/키워드: 3-D embedded inductor

검색결과 13건 처리시간 0.025초

Characteristic Variation of 3-D Solenoid Embedded Inductors for Wireless Communication Systems

  • Shin, Dong-Wook;Oh, Chang-Hoon;Kim, Kil-Han;Yun, Il-Gu
    • ETRI Journal
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    • 제28권3호
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    • pp.347-354
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    • 2006
  • The characteristic variation of 3-dimensional (3-D) solenoid-type embedded inductors is investigated. Four different structures of a 3-D inductor are fabricated by using a low-temperature co-fired ceramic (LTCC) process, and their s-parameters are measured between 50 MHz and 5 GHz. The circuit model parameters of each building block are optimized and extracted using the partial element equivalent circuit method and an HSPICE circuit simulator. Based on the model parameters, the characteristics of the test structures such as self-resonant frequency, inductance, and quality (Q) factor are analyzed, and predictive modeling is applied to the structures composed of a combination of the modeled building blocks. In addition, characteristic variations of the 3-D inductors with different structures using extracted building blocks are also investigated. This approach can provide a characteristic estimation of 3-D solenoid embedded inductors for structural variations.

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임피던스 공진기를 이용한 FR-4 임베디드 광대역필터 (FR-4 Embedded UWB Filter using Uniform Impedance Resonator)

  • 양창수;윤상근;박재영
    • 전기학회논문지
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    • 제56권8호
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    • pp.1471-1475
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    • 2007
  • In this paper, a novel embedded ultra wideband (UWB) band-pass filter is presented on a FR-4 package substrate including high Dk resin coated copper (${\varepsilon}_r=30$) film. The proposed UWB filter is comprised of a parallel resonator with meander-type uniform impedance resonator (UIR) and two series resonators with high Q circular stacked spiral inductor and metal-insulator-metal (MIM) capacitor. In order to obtain excellent attenuation characteristics by generating attenuation poles in lower and upper stop bands, a single MIM capacitor is added to each resonator. The fabricated FR-4 embedded UWB filter has insertion loss of -1.0dB and return loss of -11dB, respectively. It has also extremely wide bandwidth (over 50%) and small size ($3.7{\times}4{\times}0.77\;mm^3$) which is compatible with LTCC devices.

나선형 인덕터의 디임베드 검증을 통한 CMOS LNA 설계 및 제작 (The Design and Fabrication of CMOS LNA through De-embedded Verification of the Spiral Inductor)

  • 이한영;유영길
    • 전기학회논문지
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    • 제57권12호
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    • pp.2269-2275
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    • 2008
  • This paper examined the simulation results after applying not only spiral inductor's 3D EM simulation but also de-embedding technique to reduce the pad's RF effects. When calculating standard deviation with measurement results not only the gain at 0.5GHz${\sim}$4GHz but also noise figure at 1.8GHz${\sim}$4GHz, the simulation results includes de-embedded inductor' model improved gain deviation by 0.171 and noise figure deviation by 0.151 than the results from simulation with foundry inductor equivalent circuit models.

3차원 매립형 수동소자의 특성 예측 및 분석에 대한 연구 (Characteristic Prediction and Analysis of 3-D Embedded Passive Devices)

  • 신동욱;오창훈;이규복;김종규;윤일구
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2003년도 하계학술대회 논문집 Vol.4 No.2
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    • pp.607-610
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    • 2003
  • The characteristic prediction and analysis of 3-dimensional (3-D) solenoid-type embedded inductors is investigated. The four different structures of 3-D inductor are fabricated by using low-temperature cofired ceramic (LTCC) process. The circuit model parameters of the each building block are optimized and extracted using the partial element equivalent circuit method and HSPICE circuit simulator. Based on the model parameters, predictive modeling is applied for the structures composed of the combination of the modeled building blocks. And the characteristics of test structures, such as self-resonant frequency, inductance and Q-factor, are analyzed. This approach can provide the characteristic conception of 3-D solenoid embedded inductors for structural variations.

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유기 패키지 기판내에 내장된 LC 다이플렉서 회로 (Fully Embedded LC Diplexer Passive Circuit into an Organic Package Substrate)

  • 이환희;박재영;이한성;윤상근
    • 한국공작기계학회논문집
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    • 제16권6호
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    • pp.201-204
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    • 2007
  • In this paper, fully embedded and miniaturized diplexer device has been developed and characterized for dual-band/mode CDMA handset applications. The size of the embedded diplexer is significantly reduced by embedding high Q circular spiral inductors and high DK MIM capacitors into a low cost organic package substrate. The fabricated diplexer has insertion losses and isolations of -0.5 and -23 dB at 824-894 MHz and -0.7 and -22 dB at 1850-1990 MHz, respectively. Its size is $3.9mm{\times}3.9mm{\times}0.77mm$. The fabricated diplexer is the smallest one which is fully embedded into a low cost organic package substrate.

Fully Embedded 2.4GHz Compact Band Pass Filter into Multi-Layered Organic Packaging Substrate

  • Lee, Seung-J.;Lee, Duk-H.;Park, Jae-Y.
    • 마이크로전자및패키징학회지
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    • 제15권1호
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    • pp.39-44
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    • 2008
  • In this paper, fully embedded 2.4GHz WLAN band pass filter (BPF) was investigated into a multi-layered organic packaging substrate using high Q spiral stacked inductors and high Dk MIM capacitors for low cost RF System on Package (SOP) applications. The proposed 2.4GHz WLAN BPF was designed by modifying chebyshev second order filter circuit topology. It was comprised of two parallel LC resonators for obtaining two transmission zeros. It was designed by using 2D circuit and 3D EM simulators for finding out optimal geometries and verifying their applicability. It exhibited an insertion loss of max -1.7dB and return loss of min -l7dB. The two transmission zeros were observed at 1.85 and 6.7GHz, respectively. In the low frequency band of $1.8GHz{\sim}1.9GHz$, the stop band suppression of min -23dB was achieved. In the high frequency band of $4.1GHz{\sim}5.4GHz$, the stop band suppression of min -l8dB was obtained. It was the first embedded and the smallest one of the filters formed into the organic packaging substrate. It has a size of $2.2{\times}1.8{\times}0.77mm^3$.

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저가형 RF SOP 응용을 위한 임베디드 인덕터에 관한 연구 (PCB Embedded Spiral Inductors for low cost RF SOP Applications)

  • 이환희;박재영;이한성
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2006년도 제37회 하계학술대회 논문집 C
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    • pp.1301-1302
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    • 2006
  • In this paper, embedded spiral inductors are investigated into the PCB substrate for low cost RF SOP applications. The spiral inductors designed with geometrical variations were simulated, fabricated, measured, and characterized by using 3D EM simulator, 8 layered PCB standard process and HP 8510B network analyzer (or verifying their applicability. The fabricated embedded spiral inductor has inductance of 9.4 nH at 800MHz, maximum quality factor of 64.8 at 1.09GHz and self resonant frequency of 3.93GHz, respectively. As the measured inductances and quality factors are well matched with simulated ones. PCB embedded spiral inductors are promising for advanced electronic systems with various functionality, low cost, small size and volume.

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저온 동시소성 공정으로 제작된 3차원 매립 인덕터 모델링 (Modeling of 3-D Embedded Inductors Fabricated in LTCC Process)

  • 이서구;최종성;윤일구
    • 한국전기전자재료학회논문지
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    • 제15권4호
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    • pp.344-348
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    • 2002
  • As microelectronics technology continues to progress, there is also a continuous demand on highly integration and miniaturization of systems. For example, it is desirable to package several integrated circuits together in multilayer structure, such as multichip modules, to achieve higher levels of compactness and higher performance. Passive components (i.e., capacitors, resistors, and inductors) are very important fort many MCM applications. In addition, the low-temperature co-fired ceramic (LTCC) process has considerable potential for embedding passive components in a small area at a low cost. In this paper, we investigate a method of statistically modeling integrated passive devices from just a small number of test structures. A set of LTCC inductors is fabricated and their scattering parameters (s-parameters) are measured for a range of frequencies from 50MHz to 5GHz. An accurate model for each test structure is obtained by using a building block based modeling methodology and circuit parameter optimization using the HSPICE circuit simulator.

구조 변화에 따른 LTCC 매립형 인덕터 등가모델 연구 (Study of the equivalent circuit model on LTCC embedded inductors)

  • 오창훈;신동욱;이규복;김종규;윤일구
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2002년도 하계학술대회 논문집 Vol.3 No.2
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    • pp.678-681
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    • 2002
  • In this paper, Characterization for several 3-D embedded passive elements with different structures was performed. The equivalent circuit optimization for embedded inductor was performed by HSPICE simulation software. After extracting each parameter values, the difference of parameter from each structure was examined. From this work, effective characterization of passive devices with similar structure will be possible.

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고속 3차원 매립 인덕터에 대한 모델링 (Modeling of High-speed 3-Disional Embedded Inductors)

  • 이서구;최종성;윤일구
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2001년도 하계학술대회 논문집
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    • pp.139-142
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    • 2001
  • As microeletronics technology continues to progress, there is also a continuous demand on highly integration and miniaturization of systems. For example, it is desirable to package several integrated circuits together in multilayer structure, such as multichip modules, to achieve higher levels of compactness and higher performance. Passive components (i.e., capacitors, resistors, and inductors) are very important for many MCM applications. In addition, the low-temperature co-fired ceramic (LTCC) process has considerable potential for embedding passive components in a small area at a low cost. In this paper, we investigate a method of statistically modeling integrated passive devices from just a small number of test structures. A set of LTCC inductors is fabricated and their scattering parameters (5-parameters) are measured for a range of frequencies from 50MHz to 5GHz. An accurate model for each test structure is obtained by using a building block based modeling methodology and circuit parameter optimization using the HSPICE circuit simulator.

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