• Title/Summary/Keyword: 3-D Real Time Graphics

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Comparison of Compression Schemes for Real-Time 3D Texture Mapping (실시간 3차원 텍스춰 매핑을 위한 압축기법의 성능 비교)

  • Park, Gi-Ju;Im, In-Seong
    • Journal of the Korea Computer Graphics Society
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    • v.6 no.4
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    • pp.35-42
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    • 2000
  • 3D texture mapping generates highly natural visual effects in which objects appear carved from lumps of materials rather than laminated with thin sheets as in 2D texture mapping. Storing 3D texture images in a table for fast mapping computations, instead of evaluating procedures on the fly, however, has been considered impractical due to the extremely high memory requirement. Recently, a practical real-time 3D texture mapping technique was proposed in [11], where they attempt to resolve the potential texture memory problem by compressing 3D textures using a wavelet-based encoding method. In this paper, we consider two other encoding schemes that could also be applied to the compression-based 3D texture mapping. In particular, we extend the vector quantization and FXT1 for 3D texture compression, and compare their performance with the wavelet-based encoding scheme.

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Multi-scale 3D Panor ama Content Augmented System using Depth-map

  • Kim, Cheeyong;Kim, Eung-Kon;Kim, Jong-Chan
    • Journal of Korea Multimedia Society
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    • v.17 no.6
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    • pp.733-740
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    • 2014
  • With the development and spread of 3D display, users can easily experience an augmented reality with 3D features. Therefore, the demand for content of an augmented reality is exponentially growing in various fields. A traditional augmented reality environment was generally created by CG(Computer Graphics) modelling production tools. However, this method takes too much time and efforts to create an augmented environment. To create an augmented environment similar to the real world, everything in the real world should be measured, gone through modeling, and located in an augmented environment. But the time and efforts spent in the creation don't produce the same environment as the real world, making it hard for users to feel the sense of reality. In this study, multi-scale 3D panorama content augmented system is suggested by using a depth-map. By finding matching features from images to add 3D features to an augmented environment, a depth-map is derived and embodied as panorama, producing high-quality augmented content system with a sense of reality. With this study, limits of 2D panorama technologies will be overcome and a sense of reality and immersion will be provided to users with a natural navigation.

Real-Time 3D Volume Deformation and Visualization by Integrating NeRF, PBD, and Parallel Resampling (NeRF, PBD 및 병렬 리샘플링을 결합한 실시간 3D 볼륨 변형체 시각화)

  • Sangmin Kwon;Sojin Jeon;Juni Park;Dasol Kim;Heewon Kye
    • Journal of the Korea Computer Graphics Society
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    • v.30 no.3
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    • pp.189-198
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    • 2024
  • Research combining deep learning-based models and physical simulations is making important advances in the medical field. This extracts the necessary information from medical image data and enables fast and accurate prediction of deformation of the skeleton and soft tissue based on physical laws. This study proposes a system that integrates Neural Radiance Fields (NeRF), Position-Based Dynamics (PBD), and Parallel Resampling to generate 3D volume data, and deform and visualize them in real-time. NeRF uses 2D images and camera coordinates to produce high-resolution 3D volume data, while PBD enables real-time deformation and interaction through physics-based simulation. Parallel Resampling improves rendering efficiency by dividing the volume into tetrahedral meshes and utilizing GPU parallel processing. This system renders the deformed volume data using ray casting, leveraging GPU parallel processing for fast real-time visualization. Experimental results show that this system can generate and deform 3D data without expensive equipment, demonstrating potential applications in engineering, education, and medicine.

Design of a Floating Point Unit for 3D Graphics Geometry Engine (3D 그래픽 Geometry Engine을 위한 부동소수점 연산기의 설계)

  • Kim, Myeong Hwm;Oh, Min Seok;Lee, Kwang Yeob;Kim, Won Jong;Cho, Han Jin
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.10 s.340
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    • pp.55-64
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    • 2005
  • In this paper, we designed floating point units to accelate real-time 3D Graphics for Geometry processing. Designed floating point units support IEEE-754 single precision format and we confirmed 100 MHz performance of floating point add/mul unit, 120 MHz performance of floating point NR inverse division unit, 200 MHz performance of floating point power unit, 120 MHz performance of floating point inverse square root unit at Xilinx-vertex2. Also, using floating point units, designed Geometry processor and confirmed 3D Graphics data processing.

Fast Generation Methods for Computer-Generated Hologram Using a Modified Recursive Addition Algorithm

  • Choi, Hyun-Jun
    • Journal of information and communication convergence engineering
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    • v.11 no.4
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    • pp.282-287
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    • 2013
  • A real-time digital holographic display is the core technology for the next-generation 3DTV. Holographic display requires a considerably large amount of calculation. If generating a large number of digital holograms is intended, the amount of calculation and the time required increase exponentially. This is a significant obstacle in a real-time hologram service. This paper proposes an algorithm that increases the speed of generating a Fresnel hologram by using a recursive addition operation covering the entire coordinate array of a digital hologram. The 3D object designed to calculate the digital hologram uses a depth-map image produced by computer graphics. The proposed algorithm is a technique that performs the computer-generated holography (CGH) operation with only recursive addition of all of the hologram's coordinates by analyzing the regularity between the 3D object and the digital hologram coordinates. The experimental results show that the proposed algorithm increases the operation speed by 70% over the technique using the conventional CGH equation and by more than 30% over the previously proposed recursive technique.

Implementation of Lattice Reduction-aided Detector using GPU on SDR System (SDR 시스템에서 GPU를 사용한 Lattice Reduction-aided 검출기 구현)

  • Kim, Tae Hyun;Leem, Hyun Seok;Choi, Seung Won
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.7 no.3
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    • pp.55-61
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    • 2011
  • This paper presents an implementation of Lattice Reduction (LR)-aided detector for Multiple-Input Multiple-Output (MIMO) system using Graphics Processing Unit (GPU). GPU is a parallel processor which has a number of Arithmetic Logic Units (ALUs), thus, it can minimize the operation time of LR algorithm through the parallelization using multiple threads in the GPU. Through the implemented LR-aided detector, we verify that the LR-aided detector operates a lot faster than Maximum Likelihood (ML) detector. The implemented LR-aided detector has been applied to WiMAX system to show the feasibility of its real-time processing. In addition, we demonstrate that the processing time can be reduced at the cost of 3dB SNR loss by limiting the repeating loop in Lenstra-Lenstra-Lovasz (LLL) algorithm which is frequently used in LR-aided detector.

A Design of Floating-Point Geometry Processor for Embedded 3D Graphics Acceleration (내장형 3D 그래픽 가속을 위한 부동소수점 Geometry 프로세서 설계)

  • Nam Ki hun;Ha Jin Seok;Kwak Jae Chang;Lee Kwang Youb
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.2 s.344
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    • pp.24-33
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    • 2006
  • The effective geometry processing IP architecture for mobile SoC that has real time 3D graphics acceleration performance in mobile information system is proposed. Base on the proposed IP architecture, we design the floating point arithmetic unit needed in geometry process and the floating point geometry processor supporting the 3D graphic international standard OpenGL-ES. The geometry processor is implemented by 160k gate area in a Xilinx-Vertex FPGA and we measure the performance of geometry processor using the actual 3D graphic data at 80MHz frequency environment The experiment result shows 1.5M polygons/sec processing performance. The power consumption is measured to 83.6mW at Hynix 0.25um CMOS@50MHz.

CGRA Compilation Boost up for Acceleration of Graphics (영상처리 가속을 위한 CGRA compilation 속도 향상)

  • Kim, Wonsub;Choi, Yoonseo;Kim, Jaehyun
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2014.06a
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    • pp.166-168
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    • 2014
  • Coarse-grained reconfigurable architectures (CGRAs) present a potential of high compute throughput with energy efficiency. A CGRA consists of an array of functional units (FU), which communicate with each other through an interconnect network containing transmission nodes and register files. To achieve high performance from the software solutions mapped onto CGRAs, modulo scheduling of loops is generally employed. One of the key challenges in modulo scheduling for CGRAs is to explicitly handle routings of operands from a source to a destination operations through various routing resources. Existing modulo schedulers for CGRAs are slow because finding a valid routing is generally a searching problem over a large space, even with the guidance of well-defined cost metrics. Applications in traditional embedded multimedia domains are regarded relatively tolerant to a slow compile time in exchange of a high quality solution. However, many rapidly growing domains of applications, such as 3D graphics, require a fast compilation. Entrances of CGRAs to these domains have been blocked mainly due to its long compile time. We attack this problem by utilizing patternized routes, for which resources and time slots for a success can be estimated in advance when a source operation is placed. By conservatively reserving predefined resources at predefined time slots, future routings originated from the source operation are guaranteed. Experiments on a real-world 3D graphics benchmark suite show that our scheduler improves the compile time up to 6000 times while achieving average 70% throughputs of the state-of-art CGRA modulo scheduler, edge-centric modulo scheduler (EMS).

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Implementation of a 3D Graphics Hardwired T&L Accelerator based on a SoC Platform for a Mobile System (SoC 플랫폼 기반 모바일용 3차원 그래픽 Hardwired T&L Accelerator 구현)

  • Lee, Kwang-Yeob;Koo, Yong-Seo
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.9
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    • pp.59-70
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    • 2007
  • In this paper, we proposed an effective T&L(Transform & Lighting) Processor architecture for a real time 3D graphics acceleration SoC(System on a Chip) in a mobile system. We designed Floating point arithmetic IPs for a T&L processor. And we verified IPs using a SoC Platform. Designed T&L Processor consists of 24 bit floating point data format and 16 bit fixed point data format, and supports the pipeline keeping the balance between Transform process and Lighting process using a parallel computation of 3D graphics. The delay of pipeline processing only Transform operation is almost same as the delay processing both Transform operation and Lighting operation. Designed T&L Processor is implemented and verified using a SoC Platform. The T&L Processor operates at 80MHz frequency in Xilinx-Virtex4 FPGA. The processing speed is measured at the rate of 20M Vertexes/sec.

Design and Implementation of 3D Visualization System for Real-time Environmental Sensor Data (실시간 환경 센서 데이터의 3차원 시각화 시스템 설계 및 구현)

  • Kim, KyeongOg;Ban, KyeongJin;Ryu, NamHoon;Kim, EungKon
    • Proceedings of the Korea Contents Association Conference
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    • 2007.11a
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    • pp.783-787
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    • 2007
  • Although data analysis in earlier days had been sufficiently done only by character user interface, users of these days are more used to the graphic user interface and the requirements for the user interface are gradually varying and increasing. In order to meet users' various wants and needs and to develop well-equipped interface, not only software developers but also professional designers who can complement the technique of the developers are needed. But in reality there are many restrictions and difficulties for developers and designers to work together cooperatively. Moreover, developing user interface in use of 3D type of graphics and animation techniques causes the rise of the developing cost. The thesis attempts to design and implement 3D visualization for real-time sensor data collected by the various environmental sensor and measuring devices, by using WPF (Window Presentation Foundation) which can make both developers and designers work together cooperatively and which makes it possible to implement various multimedia functions such as a 2D and 3D type of graphics, animation techniques, and an acoustic effect.

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